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SN74HC03DR
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Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+50@@ -0,0 +1,50 @@+# SN74HC03DR++**Texas Instruments** · Logic Gates · SOIC-14++SN74HC03DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Input A for 2-input NAND gate 1, accepts logic levels 0 to VCC. |+| 2 | 1B | input | Input B for 2-input NAND gate 1, accepts logic levels 0 to VCC. |+| 3 | 1Y | output | Open-drain output of NAND gate 1 (Y = 1A ● 1B), can drive 10 LSTTL loads with ±4-mA drive at 5 V. |+| 4 | 2A | input | Input A for 2-input NAND gate 2, accepts logic levels 0 to VCC. |+| 5 | 2B | input | Input B for 2-input NAND gate 2, accepts logic levels 0 to VCC. |+| 6 | 2Y | output | Open-drain output of NAND gate 2 (Y = 2A ● 2B), can drive 10 LSTTL loads with ±4-mA drive at 5 V. |+| 7 | GND | power_in | Ground (0 V reference), continuous current up to ±50 mA. |+| 8 | 3Y | output | Open-drain output of NAND gate 3 (Y = 3A ● 3B), can drive 10 LSTTL loads with ±4-mA drive at 5 V. |+| 9 | 3A | input | Input A for 2-input NAND gate 3, accepts logic levels 0 to VCC. |+| 10 | 3B | input | Input B for 2-input NAND gate 3, accepts logic levels 0 to VCC. |+| 11 | 4Y | output | Open-drain output of NAND gate 4 (Y = 4A ● 4B), can drive 10 LSTTL loads with ±4-mA drive at 5 V. |+| 12 | 4A | input | Input A for 2-input NAND gate 4, accepts logic levels 0 to VCC. |+| 13 | 4B | input | Input B for 2-input NAND gate 4, accepts logic levels 0 to VCC. |+| 14 | VCC | power_in | Positive supply voltage, operating range 2 V to 6 V, maximum ICC of 20 µA. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `SN74HC03DR`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)+- 3D model files: `sn74hc03dr-etched.step` / `sn74hc03dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc03dr.step` / `sn74hc03dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hc03.pdf) (33 pp, sha256 `656bec2df881e6df`, retrieved 2026-10-03, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc03dr-datasheet.pdf)
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