component
SN74HC02
Public Made by Adomby adom
TI quad 2-input NOR gate, SOIC-14. Output high only when both inputs low. HC CMOS 2-6 V. Datasheet-verified.
← Commit history
sn74hc02: backfill missing artifacts (etch, variants)
3 files changed
+22358−8
diff truncated
README.md+2@@ -38,6 +38,8 @@ Four independent 2-input NOR gates in high-speed CMOS, SOIC-14. Each output goes ## Ordering variants +Same part, different packaging or reel option.+ - `SN74HC02D (SOIC-14, tube)` - `SN74HC02DR (SOIC-14, tape & reel)`
page.json+19−8@@ -35,25 +35,25 @@ "number": "1", "name": "1Y", "type": "output",- "description": "Channel 1 NOR gate output Y = NOT(1A + 1B). Balanced CMOS push-pull output; \u00b14 mA drive at VCC = 4.5 V."+ "description": "Channel 1 NOR gate output Y = NOT(1A + 1B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V." }, { "number": "2", "name": "1A", "type": "input",- "description": "Channel 1 NOR gate input A. Standard CMOS high-impedance input; VIH \u2265 3.15 V and VIL \u2264 1.35 V at VCC = 4.5 V."+ "description": "Channel 1 NOR gate input A. Standard CMOS high-impedance input; VIH ≥ 3.15 V and VIL ≤ 1.35 V at VCC = 4.5 V." }, { "number": "3", "name": "1B", "type": "input",- "description": "Channel 1 NOR gate input B. Standard CMOS high-impedance input; VIH \u2265 3.15 V and VIL \u2264 1.35 V at VCC = 4.5 V."+ "description": "Channel 1 NOR gate input B. Standard CMOS high-impedance input; VIH ≥ 3.15 V and VIL ≤ 1.35 V at VCC = 4.5 V." }, { "number": "4", "name": "2Y", "type": "output",- "description": "Channel 2 NOR gate output Y = NOT(2A + 2B). Balanced CMOS push-pull output; \u00b14 mA drive at VCC = 4.5 V."+ "description": "Channel 2 NOR gate output Y = NOT(2A + 2B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V." }, { "number": "5",@@ -89,7 +89,7 @@ "number": "10", "name": "3Y", "type": "output",- "description": "Channel 3 NOR gate output Y = NOT(3A + 3B). Balanced CMOS push-pull output; \u00b14 mA drive at VCC = 4.5 V."+ "description": "Channel 3 NOR gate output Y = NOT(3A + 3B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V." }, { "number": "11",@@ -107,7 +107,7 @@ "number": "13", "name": "4Y", "type": "output",- "description": "Channel 4 NOR gate output Y = NOT(4A + 4B). Balanced CMOS push-pull output; \u00b14 mA drive at VCC = 4.5 V."+ "description": "Channel 4 NOR gate output Y = NOT(4A + 4B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V." }, { "number": "14",@@ -146,7 +146,7 @@ "Supply voltage": "2-6 V", "Pin note": "output-first order (1Y, 1A, 1B)", "Package": "SOIC-14",- "Body (L\u00d7W\u00d7H)": "8.65 \u00d7 3.9 \u00d7 1.75 mm"+ "Body (L×W×H)": "8.65 × 3.9 × 1.75 mm" } }, "sections": [@@ -183,6 +183,17 @@ "docs/hero.png", "docs/sn74hc02-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "sn74hc02-etched.step"+ ],+ "variants": [+ {+ "mpn": "SN74HC02D (SOIC-14, tube)",+ "kind": "packaging"+ },+ {+ "mpn": "SN74HC02DR (SOIC-14, tape & reel)",+ "kind": "packaging"+ } ] }
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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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