SN74HC02

@@ -0,0 +1,58 @@+# SN74HC02++**Texas Instruments** · Quad 2-input NOR gate · SOIC-14++Four independent 2-input NOR gates in high-speed CMOS, SOIC-14. Each output goes high only when both inputs are low (it is an OR followed by an inversion). NOR is functionally complete, so these gates build any logic function, and a cross-coupled pair makes a simple SR latch. Note the pin order puts each gate's output first (1Y, then 1A, 1B), the mirror of the 74HC00 NAND layout. Runs 2-6 V.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1Y | output | Channel 1 NOR gate output Y = NOT(1A + 1B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V. |+| 2 | 1A | input | Channel 1 NOR gate input A. Standard CMOS high-impedance input; VIH ≥ 3.15 V and VIL ≤ 1.35 V at VCC = 4.5 V. |+| 3 | 1B | input | Channel 1 NOR gate input B. Standard CMOS high-impedance input; VIH ≥ 3.15 V and VIL ≤ 1.35 V at VCC = 4.5 V. |+| 4 | 2Y | output | Channel 2 NOR gate output Y = NOT(2A + 2B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V. |+| 5 | 2A | input | Channel 2 NOR gate input A. Standard CMOS high-impedance input. |+| 6 | 2B | input | Channel 2 NOR gate input B. Standard CMOS high-impedance input. |+| 7 | GND | power_in | Ground reference (0 V). Supply return for all four NOR gates. |+| 8 | 3A | input | Channel 3 NOR gate input A. Standard CMOS high-impedance input. |+| 9 | 3B | input | Channel 3 NOR gate input B. Standard CMOS high-impedance input. |+| 10 | 3Y | output | Channel 3 NOR gate output Y = NOT(3A + 3B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V. |+| 11 | 4A | input | Channel 4 NOR gate input A. Standard CMOS high-impedance input. |+| 12 | 4B | input | Channel 4 NOR gate input B. Standard CMOS high-impedance input. |+| 13 | 4Y | output | Channel 4 NOR gate output Y = NOT(4A + 4B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V. |+| 14 | VCC | power_in | Positive supply rail. Operating range 2 V to 6 V (absolute max 7 V). Bypass with a 100 nF ceramic to GND close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Type | Quad 2-input NOR gate |+| Gates | 4 independent |+| Function | Y = NOT (A OR B) |+| Logic family | HC (high-speed CMOS) |+| Supply voltage | 2-6 V |+| Pin note | output-first order (1Y, 1A, 1B) |+| Package | SOIC-14 |+| Body (L×W×H) | 8.65 × 3.9 × 1.75 mm |++## Ordering variants++- `SN74HC02D (SOIC-14, tube)`+- `SN74HC02DR (SOIC-14, tape & reel)`++## CAD (KiCad official)++- Symbol: `74xx:74HC02`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hc02.pdf) (43 pp, sha256 `c00a60e986d9a3bc`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc02-datasheet.pdf)

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