component
SN74CBTLV3257DR
Public Made by Adomby adom
Texas Instruments Analog Switches, Multiplexers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+52@@ -0,0 +1,52 @@+# SN74CBTLV3257DR++**Texas Instruments** · Analog Switches, Multiplexers · SOIC-16++SN74CBTLV3257DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | S | input | Select input that controls the data-flow path of the multiplexer/demultiplexer (S0 in the body text, S in the pin table). |+| 2 | 1B1 | bidirectional | Channel 1 in/out port 1 of the FET switch, with a 5 Ω switch connection between the two ports. |+| 3 | 1B2 | bidirectional | Channel 1 in/out port 2 of the FET switch, with a 5 Ω switch connection between the two ports. |+| 4 | 1A | bidirectional | Channel 1 out/in common port of the FET switch, with rail-to-rail switching on the data I/O ports. |+| 5 | 2B1 | bidirectional | Channel 2 in/out port 1 of the FET switch, with a 5 Ω switch connection between the two ports. |+| 6 | 2B2 | bidirectional | Channel 2 in/out port 2 of the FET switch, with a 5 Ω switch connection between the two ports. |+| 7 | 2A | bidirectional | Channel 2 out/in common port of the FET switch, with rail-to-rail switching on the data I/O ports. |+| 8 | GND | power_in | Ground reference for the device. |+| 9 | 3A | bidirectional | Channel 3 out/in common port of the FET switch, with rail-to-rail switching on the data I/O ports. |+| 10 | 3B2 | bidirectional | Channel 3 in/out port 2 of the FET switch, with a 5 Ω switch connection between the two ports. |+| 11 | 3B1 | bidirectional | Channel 3 in/out port 1 of the FET switch, with a 5 Ω switch connection between the two ports. |+| 12 | 4A | bidirectional | Channel 4 out/in common port of the FET switch, with rail-to-rail switching on the data I/O ports. |+| 13 | 4B2 | bidirectional | Channel 4 in/out port 2 of the FET switch, with a 5 Ω switch connection between the two ports. |+| 14 | 4B1 | bidirectional | Channel 4 in/out port 1 of the FET switch, with a 5 Ω switch connection between the two ports. |+| 15 | OE | input | Active-low output enable; the FET multiplexers/demultiplexers are disabled when OE is high, and OE must be tied to VCC through a pullup resistor to hold the high-impedance state during power up or down. |+| 16 | VCC | power_in | Power supply pin; the absolute maximum supply voltage is -0.5 V to 4.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Interface |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `SN74CBTLV3257DR`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `sn74cbtlv3257dr-etched.step` / `sn74cbtlv3257dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74cbtlv3257dr.step` / `sn74cbtlv3257dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74cbtlv3257.pdf) (41 pp, sha256 `ddb143a7fecbb5ee`, retrieved 2026-10-07, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74cbtlv3257dr-datasheet.pdf)
page.jsonadded+248@@ -0,0 +1,248 @@+{+ "slug": "sn74cbtlv3257dr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Analog Switches, Multiplexers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "interface",+ "sn74cbtlv3257dr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "sn74cbtlv3257dr.kicad_sym",+ "sn74cbtlv3257dr.kicad_mod",+ "sn74cbtlv3257dr.glb",+ "sn74cbtlv3257dr.step",+ "sn74cbtlv3257dr.lbr",+ "docs/hero.png",+ "docs/sn74cbtlv3257dr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "sn74cbtlv3257dr-hero.glb",+ "sn74cbtlv3257dr-hero.overlay.json"+ ],+ "component": {+ "mpn": "SN74CBTLV3257DR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Interface",+ "subcategory": "Analog Switches, Multiplexers",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74cbtlv3257.pdf",+ "parts": {+ "symbol": "sn74cbtlv3257dr.kicad_sym",+ "footprint": "sn74cbtlv3257dr.kicad_mod",+ "model_3d": "sn74cbtlv3257dr-hero.glb",+ "model_3d_plain": "sn74cbtlv3257dr.glb",+ "model_3d_step": "sn74cbtlv3257dr-etched.step",+ "model_3d_step_plain": "sn74cbtlv3257dr.step",+ "lbr": "sn74cbtlv3257dr.lbr"+ },+ "distributor_links": {+ "lcsc": "C10012",+ "digikey": "296-9137-2-ND",+ "mouser": "595-SN74CBTLV3257DR"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T23:00:46Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-9137-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-SN74CBTLV3257DR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "S",+ "type": "input",+ "description": "Select input that controls the data-flow path of the multiplexer/demultiplexer (S0 in the body text, S in the pin table)."+ },+ {+ "number": "2",+ "name": "1B1",+ "type": "bidirectional",+ "description": "Channel 1 in/out port 1 of the FET switch, with a 5 Ω switch connection between the two ports."+ },+ {+ "number": "3",+ "name": "1B2",+ "type": "bidirectional",+ "description": "Channel 1 in/out port 2 of the FET switch, with a 5 Ω switch connection between the two ports."+ },+ {+ "number": "4",+ "name": "1A",+ "type": "bidirectional",+ "description": "Channel 1 out/in common port of the FET switch, with rail-to-rail switching on the data I/O ports."+ },+ {+ "number": "5",+ "name": "2B1",+ "type": "bidirectional",+ "description": "Channel 2 in/out port 1 of the FET switch, with a 5 Ω switch connection between the two ports."+ },+ {+ "number": "6",+ "name": "2B2",+ "type": "bidirectional",+ "description": "Channel 2 in/out port 2 of the FET switch, with a 5 Ω switch connection between the two ports."+ },+ {+ "number": "7",+ "name": "2A",+ "type": "bidirectional",+ "description": "Channel 2 out/in common port of the FET switch, with rail-to-rail switching on the data I/O ports."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device."+ },+ {+ "number": "9",+ "name": "3A",+ "type": "bidirectional",+ "description": "Channel 3 out/in common port of the FET switch, with rail-to-rail switching on the data I/O ports."+ },+ {+ "number": "10",+ "name": "3B2",+ "type": "bidirectional",+ "description": "Channel 3 in/out port 2 of the FET switch, with a 5 Ω switch connection between the two ports."+ },+ {+ "number": "11",+ "name": "3B1",+ "type": "bidirectional",+ "description": "Channel 3 in/out port 1 of the FET switch, with a 5 Ω switch connection between the two ports."+ },+ {+ "number": "12",+ "name": "4A",+ "type": "bidirectional",+ "description": "Channel 4 out/in common port of the FET switch, with rail-to-rail switching on the data I/O ports."+ },+ {+ "number": "13",+ "name": "4B2",+ "type": "bidirectional",+ "description": "Channel 4 in/out port 2 of the FET switch, with a 5 Ω switch connection between the two ports."+ },+ {+ "number": "14",+ "name": "4B1",+ "type": "bidirectional",+ "description": "Channel 4 in/out port 1 of the FET switch, with a 5 Ω switch connection between the two ports."+ },+ {+ "number": "15",+ "name": "OE",+ "type": "input",+ "description": "Active-low output enable; the FET multiplexers/demultiplexers are disabled when OE is high, and OE must be tied to VCC through a pullup resistor to hold the high-impedance state during power up or down."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Power supply pin; the absolute maximum supply voltage is -0.5 V to 4.6 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The SOIC-16 pin numbers come from the shared 16-pin top view (Figure 4-1, page 3, covering D, DBQ, D; The pin table gives only short functional descriptions. Limits for the channel pins were taken from ; Ordering list shows SN74CBTLV3257DR as Active in SOIC (D), while SN74CBTLV3257D (no R) is Obsolete. "+ ],+ "pages_sent": 10,+ "cost_usd": 0.0653,+ "at": "2026-10-07T23:00:28"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74cbtlv3257.pdf",+ "pages": 41,+ "sha256": "ddb143a7fecbb5ee",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn74cbtlv3257dr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn74cbtlv3257dr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "967dbed6a13c3f06cc79b3683039738b116ed3366a262f83994ca1511abf1d73",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}