component
SN74AUP1G08DBVR
Public Made by Adomby adom
UMW Gates, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+8−5@@ -32,13 +32,13 @@ "number": "1", "name": "A", "type": "input",- "description": "Logic input A of the 2-input AND gate. CMOS input with VIH \u2265 0.75\u00b7VCC and VIL \u2264 0.25\u00b7VCC at VCC = 0.8 V; input voltage range 0 to 3.6 V."+ "description": "Logic input A of the 2-input AND gate. CMOS input with VIH ≥ 0.75·VCC and VIL ≤ 0.25·VCC at VCC = 0.8 V; input voltage range 0 to 3.6 V." }, { "number": "2", "name": "B", "type": "input",- "description": "Logic input B of the 2-input AND gate. CMOS input, same thresholds as pin A; input leakage IIN \u2264 0.2 \u00b5A over 0-3.6 V."+ "description": "Logic input B of the 2-input AND gate. CMOS input, same thresholds as pin A; input leakage IIN ≤ 0.2 µA over 0-3.6 V." }, { "number": "3",@@ -50,13 +50,13 @@ "number": "4", "name": "Y", "type": "output",- "description": "AND-gate output Y = A \u00b7 B. Push-pull CMOS output with balanced 4 mA sink/source capability; VOH \u2248 VCC\u22120.1 V at \u00b120 \u00b5A load."+ "description": "AND-gate output Y = A · B. Push-pull CMOS output with balanced 4 mA sink/source capability; VOH ≈ VCC−0.1 V at ±20 µA load." }, { "number": "5", "name": "VCC", "type": "power_in",- "description": "Positive supply. Recommended operating range 0.8 V to 3.6 V; absolute max \u22120.5 V to 4.6 V. Quiescent ICC \u2264 0.7 \u00b5A at VCC = 3.6 V. Bypass with a local 0.1 \u00b5F ceramic to GND."+ "description": "Positive supply. Recommended operating range 0.8 V to 3.6 V; absolute max −0.5 V to 4.6 V. Quiescent ICC ≤ 0.7 µA at VCC = 3.6 V. Bypass with a local 0.1 µF ceramic to GND." } ], "provenance": {@@ -120,5 +120,8 @@ "docs/sn74aup1g08dbvr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }