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Initial commit: component/sn74auc2g79dcur

Ray ·8d17b86791 ·8d ago
2 files changed +200
README.mdadded+44
@@ -0,0 +1,44 @@+# SN74AUC2G79DCUR++**Texas Instruments** · Flip Flops · VSSOP-8-0.5mm++SN74AUC2G79DCUR from Texas Instruments, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1CLK | input | Clock input for flip-flop 1, positive-edge triggered for data transfer to Q output |+| 2 | 1D | input | Data input for flip-flop 1, transferred to 1Q on positive-going clock edge when setup time is met |+| 3 | 2Q | output | Q output for flip-flop 2, reflects state of data input 2D after positive clock edge |+| 4 | GND | power_in | Ground |+| 5 | 2CLK | input | Clock input for flip-flop 2, positive-edge triggered for data transfer to Q output |+| 6 | 2D | input | Data input for flip-flop 2, transferred to 2Q on positive-going clock edge when setup time is met |+| 7 | 1Q | output | Q output for flip-flop 1, reflects state of data input 1D after positive clock edge |+| 8 | VCC | power_in | Supply voltage, 0.8 V to 2.7 V (optimized for 1.65 V to 1.95 V operation) |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-8-0.5mm |+| Category | Logic ICs |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `SN74AUC2G79DCUR`+- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`+- 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)+- 3D model files: `sn74auc2g79dcur-etched.step` / `sn74auc2g79dcur-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74auc2g79dcur.step` / `sn74auc2g79dcur.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74auc2g79) (20 pp, sha256 `64ed834687869f90`, retrieved 2026-09-27, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74auc2g79dcur-datasheet.pdf)
page.jsonadded+156
@@ -0,0 +1,156 @@+{+  "slug": "sn74auc2g79dcur",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Flip Flops, VSSOP-8-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic ics",+    "sn74auc2g79dcur",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74auc2g79dcur.kicad_sym",+    "sn74auc2g79dcur.kicad_mod",+    "sn74auc2g79dcur.glb",+    "sn74auc2g79dcur.step",+    "sn74auc2g79dcur.lbr",+    "docs/hero.png",+    "docs/sn74auc2g79dcur-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "SN74AUC2G79DCUR",+    "manufacturer": "Texas Instruments",+    "package": "VSSOP-8-0.5mm",+    "pin_count": 8,+    "category": "Logic ICs",+    "subcategory": "Flip Flops",+    "datasheet": "https://www.ti.com/cn/lit/gpn/sn74auc2g79",+    "parts": {+      "symbol": "sn74auc2g79dcur.kicad_sym",+      "footprint": "sn74auc2g79dcur.kicad_mod",+      "model_3d": "sn74auc2g79dcur-etched.glb",+      "model_3d_plain": "sn74auc2g79dcur.glb",+      "model_3d_step": "sn74auc2g79dcur-etched.step",+      "model_3d_step_plain": "sn74auc2g79dcur.step",+      "lbr": "sn74auc2g79dcur.lbr"+    },+    "distributor_links": {+      "lcsc": "C2677723",+      "digikey": "296-19057-2-ND",+      "mouser": "595-SN74AUC2G79DCUR"+    },+    "distributor_check": {+      "checked_at": "2026-09-27T04:41:09Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-19057-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-SN74AUC2G79DCUR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "1CLK",+        "type": "input",+        "description": "Clock input for flip-flop 1, positive-edge triggered for data transfer to Q output"+      },+      {+        "number": "2",+        "name": "1D",+        "type": "input",+        "description": "Data input for flip-flop 1, transferred to 1Q on positive-going clock edge when setup time is met"+      },+      {+        "number": "3",+        "name": "2Q",+        "type": "output",+        "description": "Q output for flip-flop 2, reflects state of data input 2D after positive clock edge"+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground"+      },+      {+        "number": "5",+        "name": "2CLK",+        "type": "input",+        "description": "Clock input for flip-flop 2, positive-edge triggered for data transfer to Q output"+      },+      {+        "number": "6",+        "name": "2D",+        "type": "input",+        "description": "Data input for flip-flop 2, transferred to 2Q on positive-going clock edge when setup time is met"+      },+      {+        "number": "7",+        "name": "1Q",+        "type": "output",+        "description": "Q output for flip-flop 1, reflects state of data input 1D after positive clock edge"+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage, 0.8 V to 2.7 V (optimized for 1.65 V to 1.95 V operation)"+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 20,+        "cost_usd": 0.1357,+        "at": "2026-09-27T04:40:52"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/sn74auc2g79",+        "pages": 20,+        "sha256": "64ed834687869f90",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file