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SN74AUC2G00DCUR
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Texas Instruments Logic Gates, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# SN74AUC2G00DCUR++**Texas Instruments** · Logic Gates · VSSOP-8++SN74AUC2G00DCUR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Gate 1 input A; tolerant to 3.6 V, and unused inputs must be held at VCC or GND. |+| 2 | 1B | input | Gate 1 input B; tolerant to 3.6 V, and unused inputs must be held at VCC or GND. |+| 3 | 2Y | output | Gate 2 NAND output (Y = A·B inverted), with ±8 mA drive at 1.8 V. |+| 4 | GND | power_in | Ground reference for the device. |+| 5 | 2A | input | Gate 2 input A; tolerant to 3.6 V, and unused inputs must be held at VCC or GND. |+| 6 | 2B | input | Gate 2 input B; tolerant to 3.6 V, and unused inputs must be held at VCC or GND. |+| 7 | 1Y | output | Gate 1 NAND output (Y = A·B inverted), with ±8 mA drive at 1.8 V. |+| 8 | VCC | power_in | Supply voltage, operating range 0.8 V to 2.7 V (designed for 1.65 V to 1.95 V), absolute maximum 3.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-8 |+| Category | Logic |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `SN74AUC2G00DCUR`+- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`+- 3D model: VSSOP-8 (KiCad packages3D, STEP)+- 3D model files: `sn74auc2g00dcur-etched.step` / `sn74auc2g00dcur-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74auc2g00dcur.step` / `sn74auc2g00dcur.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74auc2g00) (19 pp, sha256 `5b8ab28d622e6cd0`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74auc2g00dcur-datasheet.pdf)
page.jsonadded+158@@ -0,0 +1,158 @@+{+ "slug": "sn74auc2g00dcur",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Logic Gates, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "sn74auc2g00dcur",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "sn74auc2g00dcur.kicad_sym",+ "sn74auc2g00dcur.kicad_mod",+ "sn74auc2g00dcur.glb",+ "sn74auc2g00dcur.step",+ "sn74auc2g00dcur.lbr",+ "docs/hero.png",+ "docs/sn74auc2g00dcur-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "SN74AUC2G00DCUR",+ "manufacturer": "Texas Instruments",+ "package": "VSSOP-8",+ "pin_count": 8,+ "category": "Logic",+ "subcategory": "Logic Gates",+ "datasheet": "https://www.ti.com/cn/lit/gpn/sn74auc2g00",+ "parts": {+ "symbol": "sn74auc2g00dcur.kicad_sym",+ "footprint": "sn74auc2g00dcur.kicad_mod",+ "model_3d": "sn74auc2g00dcur-etched.glb",+ "model_3d_plain": "sn74auc2g00dcur.glb",+ "model_3d_step": "sn74auc2g00dcur-etched.step",+ "model_3d_step_plain": "sn74auc2g00dcur.step",+ "lbr": "sn74auc2g00dcur.lbr"+ },+ "distributor_links": {+ "lcsc": "C2871305",+ "digikey": "296-18566-2-ND",+ "mouser": "595-SN74AUC2G00DCUR"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T07:10:01Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-18566-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-SN74AUC2G00DCUR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "1A",+ "type": "input",+ "description": "Gate 1 input A; tolerant to 3.6 V, and unused inputs must be held at VCC or GND."+ },+ {+ "number": "2",+ "name": "1B",+ "type": "input",+ "description": "Gate 1 input B; tolerant to 3.6 V, and unused inputs must be held at VCC or GND."+ },+ {+ "number": "3",+ "name": "2Y",+ "type": "output",+ "description": "Gate 2 NAND output (Y = A·B inverted), with ±8 mA drive at 1.8 V."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device."+ },+ {+ "number": "5",+ "name": "2A",+ "type": "input",+ "description": "Gate 2 input A; tolerant to 3.6 V, and unused inputs must be held at VCC or GND."+ },+ {+ "number": "6",+ "name": "2B",+ "type": "input",+ "description": "Gate 2 input B; tolerant to 3.6 V, and unused inputs must be held at VCC or GND."+ },+ {+ "number": "7",+ "name": "1Y",+ "type": "output",+ "description": "Gate 1 NAND output (Y = A·B inverted), with ±8 mA drive at 1.8 V."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage, operating range 0.8 V to 2.7 V (designed for 1.65 V to 1.95 V), absolute maximum 3.6 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pinout inferred from logic diagram (PAGE 2) and standard VSSOP-8 dual-gate conventions; datasheet do"+ ],+ "pages_sent": 19,+ "cost_usd": 0.1477,+ "at": "2026-10-01T07:09:44"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/sn74auc2g00",+ "pages": 19,+ "sha256": "5b8ab28d622e6cd0",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}