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SN74ALVC08IPWRQ1
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Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+50@@ -0,0 +1,50 @@+# SN74ALVC08IPWRQ1++**Texas Instruments** · Logic Gates · TSSOP-14++SN74ALVC08IPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Gate 1 data input A; unused inputs must be held at VCC or GND, and input voltage range is 0 to 3.6 V. |+| 2 | 1B | input | Gate 1 data input B; unused inputs must be held at VCC or GND, and input voltage range is 0 to 3.6 V. |+| 3 | 1Y | output | Gate 1 output Y = A • B, with ±24 mA output drive at 3.3 V. |+| 4 | 2A | input | Gate 2 data input A; unused inputs must be held at VCC or GND, and input voltage range is 0 to 3.6 V. |+| 5 | 2B | input | Gate 2 data input B; unused inputs must be held at VCC or GND, and input voltage range is 0 to 3.6 V. |+| 6 | 2Y | output | Gate 2 output Y = A • B, with ±24 mA output drive at 3.3 V. |+| 7 | GND | power_in | Device ground reference for the 1.65 V to 3.6 V supply. |+| 8 | 3Y | output | Gate 3 output Y = A • B, with ±24 mA output drive at 3.3 V. |+| 9 | 3A | input | Gate 3 data input A; unused inputs must be held at VCC or GND, and input voltage range is 0 to 3.6 V. |+| 10 | 3B | input | Gate 3 data input B; unused inputs must be held at VCC or GND, and input voltage range is 0 to 3.6 V. |+| 11 | 4Y | output | Gate 4 output Y = A • B, with ±24 mA output drive at 3.3 V. |+| 12 | 4A | input | Gate 4 data input A; unused inputs must be held at VCC or GND, and input voltage range is 0 to 3.6 V. |+| 13 | 4B | input | Gate 4 data input B; unused inputs must be held at VCC or GND, and input voltage range is 0 to 3.6 V. |+| 14 | VCC | power_in | Supply voltage, 1.65 V to 3.6 V (recommended operating range). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `SN74ALVC08IPWRQ1`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)+- 3D model files: `sn74alvc08ipwrq1-etched.step` / `sn74alvc08ipwrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74alvc08ipwrq1.step` / `sn74alvc08ipwrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74alvc08-q1) (12 pp, sha256 `ec62d5d5017f3dfb`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74alvc08ipwrq1-datasheet.pdf)
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The tex"+ ],+ "pages_sent": 12,+ "cost_usd": 0.0615,+ "at": "2026-10-07T21:30:59"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/sn74alvc08-q1",+ "pages": 12,+ "sha256": "ec62d5d5017f3dfb",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn74alvc08ipwrq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn74alvc08ipwrq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3793776f7acddf426104ea6d0fb6609d3351f6a92ee526a8f090778ce2f81970",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}