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SN74ALS240ADWR
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Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# SN74ALS240ADWR++**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil++SN74ALS240ADWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1OE | input | Active-low output-enable input for buffer 1; drives outputs 1Y1-1Y4 to high-impedance when high |+| 2 | 1A1 | input | Data input for buffer 1, channel 1; logic levels VIL 0.8V max, VIH 2V min |+| 3 | 2Y4 | tri_state | 3-state data output for buffer 2, channel 4; 24 mA low sink, 15 mA high source capability |+| 4 | 1A2 | input | Data input for buffer 1, channel 2; logic levels VIL 0.8V max, VIH 2V min |+| 5 | 2Y3 | tri_state | 3-state data output for buffer 2, channel 3; 24 mA low sink, 15 mA high source capability |+| 6 | 1A3 | input | Data input for buffer 1, channel 3; logic levels VIL 0.8V max, VIH 2V min |+| 7 | 2Y2 | tri_state | 3-state data output for buffer 2, channel 2; 24 mA low sink, 15 mA high source capability |+| 8 | 1A4 | input | Data input for buffer 1, channel 4; logic levels VIL 0.8V max, VIH 2V min |+| 9 | 2Y1 | tri_state | 3-state data output for buffer 2, channel 1; 24 mA low sink, 15 mA high source capability |+| 10 | GND | power_in | Ground reference (0V supply common) |+| 11 | 2A1 | input | Data input for buffer 2, channel 1; logic levels VIL 0.8V max, VIH 2V min |+| 12 | 1Y4 | tri_state | 3-state data output for buffer 1, channel 4; 24 mA low sink, 15 mA high source capability |+| 13 | 2A2 | input | Data input for buffer 2, channel 2; logic levels VIL 0.8V max, VIH 2V min |+| 14 | 1Y3 | tri_state | 3-state data output for buffer 1, channel 3; 24 mA low sink, 15 mA high source capability |+| 15 | 2A3 | input | Data input for buffer 2, channel 3; logic levels VIL 0.8V max, VIH 2V min |+| 16 | 1Y2 | tri_state | 3-state data output for buffer 1, channel 2; 24 mA low sink, 15 mA high source capability |+| 17 | 2A4 | input | Data input for buffer 2, channel 4; logic levels VIL 0.8V max, VIH 2V min |+| 18 | 1Y1 | tri_state | 3-state data output for buffer 1, channel 1; 24 mA low sink, 15 mA high source capability |+| 19 | 2OE | input | Active-low output-enable input for buffer 2; drives outputs 2Y1-2Y4 to high-impedance when high |+| 20 | VCC | power_in | Supply voltage, +5V nominal with operating range 4.5-5.5V per recommended operating conditions |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-20-300mil |+| Category | Logic |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `SN74ALS240ADWR`+- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`+- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)+- 3D model files: `sn74als240adwr-etched.step` / `sn74als240adwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74als240adwr.step` / `sn74als240adwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74als240a) (25 pp, sha256 `ccb802f68342c088`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74als240adwr-datasheet.pdf)
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