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sn74ahct86dr: factory component page (tier=mfr)

Ray ·f7c1add4f6 ·1mo ago ·parent 4ec32d7
1 file changed +152−8
page.json+152−8
@@ -1,13 +1,162 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sn74ahct86dr",+  "title": "SN74AHCT86DR",+  "brief": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "sn74ahct86dr"   ],+  "component": {+    "mpn": "SN74AHCT86DR",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Gates",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74ahct86.pdf",+    "parts": {+      "symbol": "sn74ahct86dr.kicad_sym",+      "footprint": "sn74ahct86dr.kicad_mod",+      "model_3d": "sn74ahct86dr.glb",+      "model_3d_step": "sn74ahct86dr.step",+      "lbr": "sn74ahct86dr.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "1A",+        "type": "input",+        "description": "Gate 1, input A. TTL-compatible logic input for the first XOR gate. VIH >= 2 V, VIL <= 0.8 V, VI range 0 to 5.5 V."+      },+      {+        "number": "2",+        "name": "1B",+        "type": "input",+        "description": "Gate 1, input B. TTL-compatible logic input for the first XOR gate. VIH >= 2 V, VIL <= 0.8 V."+      },+      {+        "number": "3",+        "name": "1Y",+        "type": "output",+        "description": "Gate 1 output, Y = 1A XOR 1B. Push-pull CMOS output, IOH = -8 mA, IOL = 8 mA at VCC = 4.5 V."+      },+      {+        "number": "4",+        "name": "2A",+        "type": "input",+        "description": "Gate 2, input A. TTL-compatible logic input for the second XOR gate."+      },+      {+        "number": "5",+        "name": "2B",+        "type": "input",+        "description": "Gate 2, input B. TTL-compatible logic input for the second XOR gate."+      },+      {+        "number": "6",+        "name": "2Y",+        "type": "output",+        "description": "Gate 2 output, Y = 2A XOR 2B. Push-pull CMOS output, IOH = -8 mA, IOL = 8 mA."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V) for the device."+      },+      {+        "number": "8",+        "name": "3Y",+        "type": "output",+        "description": "Gate 3 output, Y = 3A XOR 3B. Push-pull CMOS output, IOH = -8 mA, IOL = 8 mA."+      },+      {+        "number": "9",+        "name": "3A",+        "type": "input",+        "description": "Gate 3, input A. TTL-compatible logic input for the third XOR gate."+      },+      {+        "number": "10",+        "name": "3B",+        "type": "input",+        "description": "Gate 3, input B. TTL-compatible logic input for the third XOR gate."+      },+      {+        "number": "11",+        "name": "4Y",+        "type": "output",+        "description": "Gate 4 output, Y = 4A XOR 4B. Push-pull CMOS output, IOH = -8 mA, IOL = 8 mA."+      },+      {+        "number": "12",+        "name": "4A",+        "type": "input",+        "description": "Gate 4, input A. TTL-compatible logic input for the fourth XOR gate."+      },+      {+        "number": "13",+        "name": "4B",+        "type": "input",+        "description": "Gate 4, input B. TTL-compatible logic input for the fourth XOR gate."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage input. Recommended operating range 4.5 V to 5.5 V. Bypass to GND with a local decoupling capacitor."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn74ahct86.pdf",+        "pages": 39,+        "sha256": "b1c951250dbdefad",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "SOIC-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "sn74ahct86dr"+  ],+  "discovery_pitch": "SN74AHCT86DR (Texas Instruments) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +174,5 @@     "docs/sn74ahct86dr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file