component
SN74AHCT1G86DBVR
Public Made by Adomby adom
UMW Gates, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -35,6 +35,20 @@ SN74AHCT1G86DBVR from UMW, in a SOT-23-5. Pinout and pin descriptions extracted - Footprint: `Package_TO_SOT_SMD:SOT-23-5` - 3D model: SOT-23-5 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`sn74ahct1g86dbvr.step`](sn74ahct1g86dbvr.step) | 85 KB | You want the bare part, or you mark your own boards. |+| [`sn74ahct1g86dbvr-etched.step`](sn74ahct1g86dbvr-etched.step) | 2.5 MB | You want the part with `SN74AHCT1G86DBVR` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 636 faces against 102 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "sn74ahct1g86dbvr",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "UMW Gates, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+9−9@@ -4,7 +4,7 @@ "slug": "sn74ahct1g86dbvr", "title": "SN74AHCT1G86DBVR", "brief": "UMW Gates, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -34,13 +34,13 @@ "number": "1", "name": "A", "type": "input",- "description": "Logic input A of the 2-input XOR gate. TTL-compatible input; VIH \u2265 2 V, VIL \u2264 0.8 V over VCC = 4.5-5.5 V. Input current \u00b11 \u00b5A max."+ "description": "Logic input A of the 2-input XOR gate. TTL-compatible input; VIH ≥ 2 V, VIL ≤ 0.8 V over VCC = 4.5-5.5 V. Input current ±1 µA max." }, { "number": "2", "name": "B", "type": "input",- "description": "Logic input B of the 2-input XOR gate. TTL-compatible input; VIH \u2265 2 V, VIL \u2264 0.8 V over VCC = 4.5-5.5 V. Input current \u00b11 \u00b5A max."+ "description": "Logic input B of the 2-input XOR gate. TTL-compatible input; VIH ≥ 2 V, VIL ≤ 0.8 V over VCC = 4.5-5.5 V. Input current ±1 µA max." }, { "number": "3",@@ -52,13 +52,13 @@ "number": "4", "name": "Y", "type": "output",- "description": "XOR gate output, Y = A \u2295 B. Push-pull CMOS output, 8 mA drive at VCC = 5 V (IOH = \u22128 mA, IOL = 8 mA); VOH \u2265 3.8 V, VOL \u2264 0.44 V under load."+ "description": "XOR gate output, Y = A ⊕ B. Push-pull CMOS output, 8 mA drive at VCC = 5 V (IOH = −8 mA, IOL = 8 mA); VOH ≥ 3.8 V, VOL ≤ 0.44 V under load." }, { "number": "5", "name": "VCC", "type": "power_in",- "description": "Positive supply voltage, 4.5 V to 5.5 V recommended (absolute max 7.0 V). Typical ICC = 1 \u00b5A, 10 \u00b5A max."+ "description": "Positive supply voltage, 4.5 V to 5.5 V recommended (absolute max 7.0 V). Typical ICC = 1 µA, 10 µA max." } ], "provenance": {@@ -132,9 +132,9 @@ "docs/hero.png", "docs/sn74ahct1g86dbvr-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "UMW Gates, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D." }