sn74ahct1g08dckr

@@ -0,0 +1,46 @@+# SN74AHCT1G08DCKR++**UMW** · Gates · SC-70-5++SN74AHCT1G08DCKR from UMW, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | Logic input A of the 2-input AND gate. TTL-compatible input; VIH min 2 V, VIL max 0.8 V at VCC = 4.5-5.5 V. Absolute maximum input voltage range -0.5 V to +7.0 V. |+| 2 | B | input | Logic input B of the 2-input AND gate. TTL-compatible input; VIH min 2 V, VIL max 0.8 V at VCC = 4.5-5.5 V. Absolute maximum input voltage range -0.5 V to +7.0 V. |+| 3 | GND | power_in | Ground reference (0 V) for the device. Absolute maximum DC ground current per supply pin ±50 mA. |+| 4 | Y | output | AND-gate logic output, Y = A · B. Drives ±8 mA at VCC = 5 V; VOH ≥ 3.8 V at IOH = -8 mA, VOL ≤ 0.44 V at IOL = 8 mA (over full temperature range). |+| 5 | VCC | power_in | Positive supply voltage. Recommended operating range 4.5 V to 5.5 V (absolute maximum 7.0 V). Typical ICC 1.0 µA, max 10 µA (VIN = VCC or GND, IO = 0). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | UMW |+| Package | SC-70-5 |+| Category | Logic |+| Pins | 5 |++## Ordering variants++- `SN74AHCT1G08DCKR`+- `SN74AHCT1G08DCKRDBVR`+- `SN74AHCT1G08DCKRDRYR`++## CAD (KiCad official)++- Symbol: `SN74AHCT1G08DCKR`+- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`+- 3D model: SC-70-5 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [UMW datasheet](docs/sn74ahct1g08dckr-datasheet.pdf) (None pp, sha256 `6d5815e70913b61e`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74ahct1g08dckr-datasheet.pdf)

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