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SN74ACT240DWR
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Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+57@@ -0,0 +1,57 @@+# SN74ACT240DWR++**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-20++SN74ACT240DWR from Texas Instruments, in a SOIC-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1OE | input | Output enable 1 (active low): when low, the 1Y outputs pass the inverted 1A data; when high, the 1Y outputs are high-impedance. |+| 2 | 1A1 | input | Data input 1A1 of buffer section 1; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V. |+| 3 | 2Y4 | output | Balanced CMOS push-pull output 2Y4 (inverting buffer, section 2); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open. |+| 4 | 1A2 | input | Data input 1A2 of buffer section 1; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V. |+| 5 | 2Y3 | output | Balanced CMOS push-pull output 2Y3 (inverting buffer, section 2); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open. |+| 6 | 1A3 | input | Data input 1A3 of buffer section 1; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V. |+| 7 | 2Y2 | output | Balanced CMOS push-pull output 2Y2 (inverting buffer, section 2); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open. |+| 8 | 1A4 | input | Data input 1A4 of buffer section 1; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V. |+| 9 | 2Y1 | output | Balanced CMOS push-pull output 2Y1 (inverting buffer, section 2); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open. |+| 10 | GND | power_in | Ground pin; unused inputs must be tied to VCC or GND. |+| 11 | 2A1 | input | Data input 2A1 of buffer section 2; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V. |+| 12 | 1Y4 | output | Balanced CMOS push-pull output 1Y4 (inverting buffer, section 1); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open. |+| 13 | 2A2 | input | Data input 2A2 of buffer section 2; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V. |+| 14 | 1Y3 | output | Balanced CMOS push-pull output 1Y3 (inverting buffer, section 1); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open. |+| 15 | 2A3 | input | Data input 2A3 of buffer section 2; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V. |+| 16 | 1Y2 | output | Balanced CMOS push-pull output 1Y2 (inverting buffer, section 1); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open. |+| 17 | 2A4 | input | Data input 2A4 of buffer section 2; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V. |+| 18 | 1Y1 | output | Balanced CMOS push-pull output 1Y1 (inverting buffer, section 1); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open. |+| 19 | 2OE | input | Output enable 2 (active low): when low, the 2Y outputs pass the inverted 2A data; when high, the 2Y outputs are high-impedance. |+| 20 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V; a pull-up from OE to VCC is recommended to hold outputs high-impedance during power-up or power-down. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-20 |+| Category | Logic |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `SN74ACT240DWR`+- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`+- 3D model: SOIC-20 (KiCad packages3D, STEP)+- 3D model files: `sn74act240dwr-etched.step` / `sn74act240dwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74act240dwr.step` / `sn74act240dwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74act240) (37 pp, sha256 `bfe8f6899871a470`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74act240dwr-datasheet.pdf)
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when high, the 1Y outputs are high-impedance."+ },+ {+ "number": "2",+ "name": "1A1",+ "type": "input",+ "description": "Data input 1A1 of buffer section 1; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V."+ },+ {+ "number": "3",+ "name": "2Y4",+ "type": "output",+ "description": "Balanced CMOS push-pull output 2Y4 (inverting buffer, section 2); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open."+ },+ {+ "number": "4",+ "name": "1A2",+ "type": "input",+ "description": "Data input 1A2 of buffer section 1; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V."+ },+ {+ "number": "5",+ "name": "2Y3",+ "type": "output",+ "description": "Balanced CMOS push-pull output 2Y3 (inverting buffer, section 2); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open."+ },+ {+ "number": "6",+ "name": "1A3",+ "type": "input",+ "description": "Data input 1A3 of buffer section 1; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V."+ },+ {+ "number": "7",+ "name": "2Y2",+ "type": "output",+ "description": "Balanced CMOS push-pull output 2Y2 (inverting buffer, section 2); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open."+ },+ {+ "number": "8",+ "name": "1A4",+ "type": "input",+ "description": "Data input 1A4 of buffer section 1; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V."+ },+ {+ "number": "9",+ "name": "2Y1",+ "type": "output",+ "description": "Balanced CMOS push-pull output 2Y1 (inverting buffer, section 2); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; unused inputs must be tied to VCC or GND."+ },+ {+ "number": "11",+ "name": "2A1",+ "type": "input",+ "description": "Data input 2A1 of buffer section 2; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V."+ },+ {+ "number": "12",+ "name": "1Y4",+ "type": "output",+ "description": "Balanced CMOS push-pull output 1Y4 (inverting buffer, section 1); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open."+ },+ {+ "number": "13",+ "name": "2A2",+ "type": "input",+ "description": "Data input 2A2 of buffer section 2; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V."+ },+ {+ "number": "14",+ "name": "1Y3",+ "type": "output",+ "description": "Balanced CMOS push-pull output 1Y3 (inverting buffer, section 1); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open."+ },+ {+ "number": "15",+ "name": "2A3",+ "type": "input",+ "description": "Data input 2A3 of buffer section 2; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V."+ },+ {+ "number": "16",+ "name": "1Y2",+ "type": "output",+ "description": "Balanced CMOS push-pull output 1Y2 (inverting buffer, section 1); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open."+ },+ {+ "number": "17",+ "name": "2A4",+ "type": "input",+ "description": "Data input 2A4 of buffer section 2; unused inputs must be held at VCC or GND, with VIH minimum 2 V and VIL maximum 0.8 V."+ },+ {+ "number": "18",+ "name": "1Y1",+ "type": "output",+ "description": "Balanced CMOS push-pull output 1Y1 (inverting buffer, section 1); recommended IOH −24 mA and IOL 24 mA, and unused outputs must be left open."+ },+ {+ "number": "19",+ "name": "2OE",+ "type": "input",+ "description": "Output enable 2 (active low): when low, the 2Y outputs pass the inverted 2A data; when high, the 2Y outputs are high-impedance."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage, 4.5 V to 5.5 V; a pull-up from OE to VCC is recommended to hold outputs high-impedance during power-up or power-down."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet is a Chinese translation (TI states the English version is controlling). Pin numbers a"+ ],+ "pages_sent": 37,+ "cost_usd": 0.1073,+ "at": "2026-10-08T20:55:48"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/sn74act240",+ "pages": 37,+ "sha256": "bfe8f6899871a470",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn74act240dwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 12.8,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "59a10b341e6972b31d81802a048060326da627d8b92dcf4263064f4f62ec808e",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn74act240dwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 12.8,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f69501382b61e56d59c873d00d4baa7c48f773553e4f01c8e47ebb2c34207094",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}