component
SN74ABT377APWR
Public Made by Adomby adom
Texas Instruments Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# SN74ABT377APWR++**Texas Instruments** · Flip Flops · TSSOP-20++SN74ABT377APWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CLKEN | input | Common clock-enable input: when low, D data is transferred to Q on the positive-going CLK edge, and the circuit is designed to prevent false clocking from CLKEN transitions. |+| 2 | 1Q | output | Flip-flop 1 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |+| 3 | 1D | input | Data input for flip-flop 1, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |+| 4 | 2D | input | Data input for flip-flop 2, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |+| 5 | 2Q | output | Flip-flop 2 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |+| 6 | 3Q | output | Flip-flop 3 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |+| 7 | 3D | input | Data input for flip-flop 3, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |+| 8 | 4D | input | Data input for flip-flop 4, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |+| 9 | 4Q | output | Flip-flop 4 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |+| 10 | GND | power_in | Ground reference for the device. |+| 11 | CLK | input | Buffered clock input; the flip-flops trigger on the positive-going edge, and the D input has no effect when CLK is at either a high or low level. |+| 12 | 5Q | output | Flip-flop 5 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |+| 13 | 5D | input | Data input for flip-flop 5, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |+| 14 | 6D | input | Data input for flip-flop 6, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |+| 15 | 6Q | output | Flip-flop 6 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |+| 16 | 7Q | output | Flip-flop 7 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |+| 17 | 7D | input | Data input for flip-flop 7, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |+| 18 | 8D | input | Data input for flip-flop 8, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |+| 19 | 8Q | output | Flip-flop 8 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |+| 20 | VCC | power_in | Supply voltage, recommended range 4.5 V to 5.5 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-20 |+| Category | Logic |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `SN74ABT377APWR`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)+- 3D model files: `sn74abt377apwr-etched.step` / `sn74abt377apwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74abt377apwr.step` / `sn74abt377apwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74abt377a.pdf) (25 pp, sha256 `37f5822de8187c3f`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74abt377apwr-datasheet.pdf)
page.jsonadded+272@@ -0,0 +1,272 @@+{+ "slug": "sn74abt377apwr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "sn74abt377apwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "sn74abt377apwr.kicad_sym",+ "sn74abt377apwr.kicad_mod",+ "sn74abt377apwr.glb",+ "sn74abt377apwr.step",+ "sn74abt377apwr.lbr",+ "docs/hero.png",+ "docs/sn74abt377apwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "sn74abt377apwr-hero.glb",+ "sn74abt377apwr-hero.overlay.json"+ ],+ "component": {+ "mpn": "SN74ABT377APWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-20",+ "pin_count": 20,+ "category": "Logic",+ "subcategory": "Flip Flops",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74abt377a.pdf",+ "parts": {+ "symbol": "sn74abt377apwr.kicad_sym",+ "footprint": "sn74abt377apwr.kicad_mod",+ "model_3d": "sn74abt377apwr-hero.glb",+ "model_3d_plain": "sn74abt377apwr.glb",+ "model_3d_step": "sn74abt377apwr-etched.step",+ "model_3d_step_plain": "sn74abt377apwr.step",+ "lbr": "sn74abt377apwr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2868669",+ "digikey": "296-4011-2-ND",+ "mouser": "595-SN74ABT377APWR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T20:18:57Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-4011-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-SN74ABT377APWR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "CLKEN",+ "type": "input",+ "description": "Common clock-enable input: when low, D data is transferred to Q on the positive-going CLK edge, and the circuit is designed to prevent false clocking from CLKEN transitions."+ },+ {+ "number": "2",+ "name": "1Q",+ "type": "output",+ "description": "Flip-flop 1 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL."+ },+ {+ "number": "3",+ "name": "1D",+ "type": "input",+ "description": "Data input for flip-flop 1, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements."+ },+ {+ "number": "4",+ "name": "2D",+ "type": "input",+ "description": "Data input for flip-flop 2, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements."+ },+ {+ "number": "5",+ "name": "2Q",+ "type": "output",+ "description": "Flip-flop 2 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL."+ },+ {+ "number": "6",+ "name": "3Q",+ "type": "output",+ "description": "Flip-flop 3 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL."+ },+ {+ "number": "7",+ "name": "3D",+ "type": "input",+ "description": "Data input for flip-flop 3, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements."+ },+ {+ "number": "8",+ "name": "4D",+ "type": "input",+ "description": "Data input for flip-flop 4, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements."+ },+ {+ "number": "9",+ "name": "4Q",+ "type": "output",+ "description": "Flip-flop 4 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device."+ },+ {+ "number": "11",+ "name": "CLK",+ "type": "input",+ "description": "Buffered clock input; the flip-flops trigger on the positive-going edge, and the D input has no effect when CLK is at either a high or low level."+ },+ {+ "number": "12",+ "name": "5Q",+ "type": "output",+ "description": "Flip-flop 5 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL."+ },+ {+ "number": "13",+ "name": "5D",+ "type": "input",+ "description": "Data input for flip-flop 5, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements."+ },+ {+ "number": "14",+ "name": "6D",+ "type": "input",+ "description": "Data input for flip-flop 6, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements."+ },+ {+ "number": "15",+ "name": "6Q",+ "type": "output",+ "description": "Flip-flop 6 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL."+ },+ {+ "number": "16",+ "name": "7Q",+ "type": "output",+ "description": "Flip-flop 7 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL."+ },+ {+ "number": "17",+ "name": "7D",+ "type": "input",+ "description": "Data input for flip-flop 7, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements."+ },+ {+ "number": "18",+ "name": "8D",+ "type": "input",+ "description": "Data input for flip-flop 8, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements."+ },+ {+ "number": "19",+ "name": "8Q",+ "type": "output",+ "description": "Flip-flop 8 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage, recommended range 4.5 V to 5.5 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The PW (TSSOP-20) pin numbering was not printed as labels in the extracted text. It was reconstructe; The datasheet lists the drive current as 'High-Drive Outputs (-32 mA IOH, 64 mA IOL)'. It does not d; The datasheet does not give a separate pin description per input; the D-input and CLK descriptions r"+ ],+ "pages_sent": 25,+ "cost_usd": 0.0891,+ "at": "2026-10-08T20:18:05"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74abt377a.pdf",+ "pages": 25,+ "sha256": "37f5822de8187c3f",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn74abt377apwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn74abt377apwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "cbe4812d6215b6219658144ef58fe99654fff4614aaf0a4ecdc562a790c2faf8",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}