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SN65LVDT9637BDR
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Texas Instruments LVDS ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# SN65LVDT9637BDR++**Texas Instruments** · LVDS ICs · SOIC-8++SN65LVDT9637BDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC | power_in | Supply pin for the 3.3 V device, specified at 3 V to 3.6 V with an absolute maximum of -0.5 V to 4 V, and a 0.1-µF capacitor should be placed as close to the device terminals as possible. |+| 2 | 1Y | output | Receiver 1 output that goes high for VID ≥ -32 mV and low for VID ≤ -100 mV, with VOH of 2.4 V min at IOH = -4 mA and VOL of 0.4 V max at IOL = 4 mA. |+| 3 | 2Y | output | Receiver 2 output that goes high for VID ≥ -32 mV and low for VID ≤ -100 mV, with VOH of 2.4 V min at IOH = -4 mA and VOL of 0.4 V max at IOL = 4 mA. |+| 4 | GND | power_in | Network ground terminal to which all non-differential voltages on the device are referenced. |+| 5 | 2B | input | Inverting differential input of receiver 2, rated for bus voltage of -2 V to 4.4 V (absolute range -4 V to 6 V) and for input current limits given in the electrical characteristics. |+| 6 | 2A | input | Non-inverting differential input of receiver 2, rated for bus voltage of -2 V to 4.4 V (absolute range -4 V to 6 V), with a differential input magnitude of 0.1 V to 3 V for the LVDS version and 0.8 V for the LVDT version. |+| 7 | 1B | input | Inverting differential input of receiver 1, rated for bus voltage of -2 V to 4.4 V (absolute range -4 V to 6 V) and for input current limits given in the electrical characteristics. |+| 8 | 1A | input | Non-inverting differential input of receiver 1, rated for bus voltage of -2 V to 4.4 V (absolute range -4 V to 6 V), with a differential input magnitude of 0.1 V to 3 V for the LVDS version and 0.8 V for the LVDT version. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Interface |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `SN65LVDT9637BDR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `sn65lvdt9637bdr-etched.step` / `sn65lvdt9637bdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn65lvdt9637bdr.step` / `sn65lvdt9637bdr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn65lvdt9637b.pdf) (23 pp, sha256 `a6fe6aaf7a83af37`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn65lvdt9637bdr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "interface",+ "sn65lvdt9637bdr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "sn65lvdt9637bdr.kicad_sym",+ "sn65lvdt9637bdr.kicad_mod",+ "sn65lvdt9637bdr.glb",+ "sn65lvdt9637bdr.step",+ "sn65lvdt9637bdr.lbr",+ "docs/hero.png",+ "docs/sn65lvdt9637bdr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "sn65lvdt9637bdr-hero.glb",+ "sn65lvdt9637bdr-hero.overlay.json"+ ],+ "component": {+ "mpn": "SN65LVDT9637BDR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Interface",+ "subcategory": "LVDS ICs",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn65lvdt9637b.pdf",+ "parts": {+ "symbol": "sn65lvdt9637bdr.kicad_sym",+ "footprint": "sn65lvdt9637bdr.kicad_mod",+ "model_3d": "sn65lvdt9637bdr-hero.glb",+ "model_3d_plain": "sn65lvdt9637bdr.glb",+ "model_3d_step": "sn65lvdt9637bdr-etched.step",+ "model_3d_step_plain": "sn65lvdt9637bdr.step",+ "lbr": "sn65lvdt9637bdr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2862622",+ "digikey": "296-6902-2-ND",+ "mouser": "595-SN65LVDT9637BDR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T16:29:13Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-6902-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-SN65LVDT9637BDR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply pin for the 3.3 V device, specified at 3 V to 3.6 V with an absolute maximum of -0.5 V to 4 V, and a 0.1-µF capacitor should be placed as close to the device terminals as possible."+ },+ {+ "number": "2",+ "name": "1Y",+ "type": "output",+ "description": "Receiver 1 output that goes high for VID ≥ -32 mV and low for VID ≤ -100 mV, with VOH of 2.4 V min at IOH = -4 mA and VOL of 0.4 V max at IOL = 4 mA."+ },+ {+ "number": "3",+ "name": "2Y",+ "type": "output",+ "description": "Receiver 2 output that goes high for VID ≥ -32 mV and low for VID ≤ -100 mV, with VOH of 2.4 V min at IOH = -4 mA and VOL of 0.4 V max at IOL = 4 mA."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Network ground terminal to which all non-differential voltages on the device are referenced."+ },+ {+ "number": "5",+ "name": "2B",+ "type": "input",+ "description": "Inverting differential input of receiver 2, rated for bus voltage of -2 V to 4.4 V (absolute range -4 V to 6 V) and for input current limits given in the electrical characteristics."+ },+ {+ "number": "6",+ "name": "2A",+ "type": "input",+ "description": "Non-inverting differential input of receiver 2, rated for bus voltage of -2 V to 4.4 V (absolute range -4 V to 6 V), with a differential input magnitude of 0.1 V to 3 V for the LVDS version and 0.8 V for the LVDT version."+ },+ {+ "number": "7",+ "name": "1B",+ "type": "input",+ "description": "Inverting differential input of receiver 1, rated for bus voltage of -2 V to 4.4 V (absolute range -4 V to 6 V) and for input current limits given in the electrical characteristics."+ },+ {+ "number": "8",+ "name": "1A",+ "type": "input",+ "description": "Non-inverting differential input of receiver 1, rated for bus voltage of -2 V to 4.4 V (absolute range -4 V to 6 V), with a differential input magnitude of 0.1 V to 3 V for the LVDS version and 0.8 V for the LVDT version."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The 8-pin D-package top-view drawing text is extracted without a clear pin-position map. Pin numbers; The datasheet's |VID| line lists LVDS 0.1 to 3 V and LVDT 0.8 V without clearly separating min and m; The datasheet gives no separate pin-level description table for the 9637B; the descriptions are buil",+ "3/8 pins cited to the wrong page (name found elsewhere): ['2:1Y@p6', '3:2Y@p6', '7:1B@p5']"+ ],+ "pages_sent": 23,+ "cost_usd": 0.1059,+ "at": "2026-10-08T16:28:58"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn65lvdt9637b.pdf",+ "pages": 23,+ "sha256": "a6fe6aaf7a83af37",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn65lvdt9637bdr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn65lvdt9637bdr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "5ded2d1550bc97da892a9977b3c4fcac38e6a80faa5c2f63b2152e83b997158f",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}