← Commit history

Initial commit: component/sn65lvdm050d

Ray ·15049ca3c5 ·2d ago
2 files changed +299
README.mdadded+52
@@ -0,0 +1,52 @@+# SN65LVDM050D++**Texas Instruments** · LVDS ICs · SOIC-16++SN65LVDM050D from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1B | input | Channel 1 inverting differential receiver input (LVDS), which detects a 50 mV differential with up to 1 V ground potential difference. |+| 2 | 1A | input | Channel 1 non-inverting differential receiver input (LVDS), which detects a 50 mV differential with up to 1 V ground potential difference. |+| 3 | 1R | output | Channel 1 receiver logic output, high for VID ≥ 50 mV, low for VID ≤ -50 mV, and high when the inputs are open (failsafe). |+| 4 | RE | input | Receiver enable input shared by both receivers (LVTTL levels are 5-V tolerant). |+| 5 | 2R | output | Channel 2 receiver logic output, high for VID ≥ 50 mV, low for VID ≤ -50 mV, and high when the inputs are open (failsafe). |+| 6 | 2A | input | Channel 2 non-inverting differential receiver input (LVDS), which detects a 50 mV differential with up to 1 V ground potential difference. |+| 7 | 2B | input | Channel 2 inverting differential receiver input (LVDS), which detects a 50 mV differential with up to 1 V ground potential difference. |+| 8 | GND | power_in | Ground. |+| 9 | 2D | input | Channel 2 driver logic input (LVTTL levels are 5-V tolerant). |+| 10 | 2Y | output | Channel 2 non-inverted differential driver output (LVDS, about 340 mV typical into a 50-Ω load), high impedance when disabled or with VCC < 1.5 V. |+| 11 | 2Z | output | Channel 2 inverted differential driver output (LVDS, about 340 mV typical into a 50-Ω load), high impedance when disabled or with VCC < 1.5 V. |+| 12 | DE | input | Driver enable input shared by both drivers; drivers are high impedance when disabled. |+| 13 | 1Z | output | Channel 1 inverted differential driver output (LVDS, about 340 mV typical into a 50-Ω load), high impedance when disabled or with VCC < 1.5 V. |+| 14 | 1Y | output | Channel 1 non-inverted differential driver output (LVDS, about 340 mV typical into a 50-Ω load), high impedance when disabled or with VCC < 1.5 V. |+| 15 | 1D | input | Channel 1 driver logic input (LVTTL levels are 5-V tolerant). |+| 16 | VCC | power_in | Single 3.3-V supply input. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Interface |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `SN65LVDM050D`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `sn65lvdm050d-etched.step` / `sn65lvdm050d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn65lvdm050d.step` / `sn65lvdm050d.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn65lvdm179) (41 pp, sha256 `da1071ed34b491ab`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn65lvdm050d-datasheet.pdf)
page.jsonadded+247
@@ -0,0 +1,247 @@+{+  "slug": "sn65lvdm050d",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments LVDS ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "sn65lvdm050d",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn65lvdm050d.kicad_sym",+    "sn65lvdm050d.kicad_mod",+    "sn65lvdm050d.glb",+    "sn65lvdm050d.step",+    "sn65lvdm050d.lbr",+    "docs/hero.png",+    "docs/sn65lvdm050d-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "sn65lvdm050d-hero.glb",+    "sn65lvdm050d-hero.overlay.json"+  ],+  "component": {+    "mpn": "SN65LVDM050D",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Interface",+    "subcategory": "LVDS ICs",+    "datasheet": "https://www.ti.com/cn/lit/gpn/sn65lvdm179",+    "parts": {+      "symbol": "sn65lvdm050d.kicad_sym",+      "footprint": "sn65lvdm050d.kicad_mod",+      "model_3d": "sn65lvdm050d-hero.glb",+      "model_3d_plain": "sn65lvdm050d.glb",+      "model_3d_step": "sn65lvdm050d-etched.step",+      "model_3d_step_plain": "sn65lvdm050d.step",+      "lbr": "sn65lvdm050d.lbr"+    },+    "distributor_links": {+      "lcsc": "C2871416",+      "digikey": "2156-SN65LVDM050D-ND",+      "mouser": "595-SN65LVDM050D"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T23:37:10Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "2156-SN65LVDM050D-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-SN65LVDM050D",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "1B",+        "type": "input",+        "description": "Channel 1 inverting differential receiver input (LVDS), which detects a 50 mV differential with up to 1 V ground potential difference."+      },+      {+        "number": "2",+        "name": "1A",+        "type": "input",+        "description": "Channel 1 non-inverting differential receiver input (LVDS), which detects a 50 mV differential with up to 1 V ground potential difference."+      },+      {+        "number": "3",+        "name": "1R",+        "type": "output",+        "description": "Channel 1 receiver logic output, high for VID ≥ 50 mV, low for VID ≤ -50 mV, and high when the inputs are open (failsafe)."+      },+      {+        "number": "4",+        "name": "RE",+        "type": "input",+        "description": "Receiver enable input shared by both receivers (LVTTL levels are 5-V tolerant)."+      },+      {+        "number": "5",+        "name": "2R",+        "type": "output",+        "description": "Channel 2 receiver logic output, high for VID ≥ 50 mV, low for VID ≤ -50 mV, and high when the inputs are open (failsafe)."+      },+      {+        "number": "6",+        "name": "2A",+        "type": "input",+        "description": "Channel 2 non-inverting differential receiver input (LVDS), which detects a 50 mV differential with up to 1 V ground potential difference."+      },+      {+        "number": "7",+        "name": "2B",+        "type": "input",+        "description": "Channel 2 inverting differential receiver input (LVDS), which detects a 50 mV differential with up to 1 V ground potential difference."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Ground."+      },+      {+        "number": "9",+        "name": "2D",+        "type": "input",+        "description": "Channel 2 driver logic input (LVTTL levels are 5-V tolerant)."+      },+      {+        "number": "10",+        "name": "2Y",+        "type": "output",+        "description": "Channel 2 non-inverted differential driver output (LVDS, about 340 mV typical into a 50-Ω load), high impedance when disabled or with VCC < 1.5 V."+      },+      {+        "number": "11",+        "name": "2Z",+        "type": "output",+        "description": "Channel 2 inverted differential driver output (LVDS, about 340 mV typical into a 50-Ω load), high impedance when disabled or with VCC < 1.5 V."+      },+      {+        "number": "12",+        "name": "DE",+        "type": "input",+        "description": "Driver enable input shared by both drivers; drivers are high impedance when disabled."+      },+      {+        "number": "13",+        "name": "1Z",+        "type": "output",+        "description": "Channel 1 inverted differential driver output (LVDS, about 340 mV typical into a 50-Ω load), high impedance when disabled or with VCC < 1.5 V."+      },+      {+        "number": "14",+        "name": "1Y",+        "type": "output",+        "description": "Channel 1 non-inverted differential driver output (LVDS, about 340 mV typical into a 50-Ω load), high impedance when disabled or with VCC < 1.5 V."+      },+      {+        "number": "15",+        "name": "1D",+        "type": "input",+        "description": "Channel 1 driver logic input (LVTTL levels are 5-V tolerant)."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Single 3.3-V supply input."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The page 1 pinout figure is garbled in the text extraction. The 16-pin mapping was reconstructed by ; The SN65LVDM050 and SN65LVDM051 figures are both in the extracted text. This mapping uses the figure; Pin types and descriptions are limited to what this excerpt states. Receiver output, enable polarity"+        ],+        "pages_sent": 6,+        "cost_usd": 0.0738,+        "at": "2026-10-07T23:36:52"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/sn65lvdm179",+        "pages": 41,+        "sha256": "da1071ed34b491ab",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "sn65lvdm050d.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          9.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "sn65lvdm050d-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          9.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "ba169729955bd3c37de6e0cadfd253c84f66f43228383b7cd0c926352d3496c8",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file