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SN65LBC172A16DW
Public Made by Adomby adom
Texas Instruments RS-485 / RS-422 ICs, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+53@@ -0,0 +1,53 @@+# SN65LBC172A16DW++**Texas Instruments** · RS-485 / RS-422 ICs · SOIC-16-300mil++SN65LBC172A16DW from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Driver 1 logic input, VIL 0 to 0.8 V and VIH 2 V to VCC. |+| 2 | 1Y | output | Driver 1 non-inverting bus output, tri-state, with current limit and thermal shutdown, bus range -7 V to 12 V. |+| 3 | 1Z | output | Driver 1 inverting bus output, tri-state, with current limit and thermal shutdown, bus range -7 V to 12 V. |+| 4 | G | input | Active-high driver enable input for the drivers, VIH 2 V to VCC and VIL 0 to 0.8 V. |+| 5 | 2Z | output | Driver 2 inverting bus output, tri-state, bus range -7 V to 12 V. |+| 6 | 2Y | output | Driver 2 non-inverting bus output, tri-state, bus range -7 V to 12 V. |+| 7 | 2A | input | Driver 2 logic input, VIL 0 to 0.8 V and VIH 2 V to VCC. |+| 8 | GND | power_in | Ground; Y and Z outputs are ESD protected to ±12000 V HBM relative to GND. |+| 9 | 3A | input | Driver 3 logic input, VIL 0 to 0.8 V and VIH 2 V to VCC. |+| 10 | 3Y | output | Driver 3 non-inverting bus output, tri-state, bus range -7 V to 12 V. |+| 11 | 3Z | output | Driver 3 inverting bus output, tri-state, bus range -7 V to 12 V. |+| 12 | G̅ | input | Active-low driver enable input for the drivers, VIH 2 V to VCC and VIL 0 to 0.8 V. |+| 13 | 4Z | output | Driver 4 inverting bus output, tri-state, bus range -7 V to 12 V. |+| 14 | 4Y | output | Driver 4 non-inverting bus output, tri-state, bus range -7 V to 12 V. |+| 15 | 4A | input | Driver 4 logic input, VIL 0 to 0.8 V and VIH 2 V to VCC. |+| 16 | VCC | power_in | Supply voltage, 4.75 V to 5.25 V recommended (absolute maximum 6 V). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16-300mil |+| Category | Interface |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `SN65LBC172A16DW`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16-300mil (KiCad packages3D, STEP)+- 3D model files: `sn65lbc172a16dw-etched.step` / `sn65lbc172a16dw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn65lbc172a16dw.step` / `sn65lbc172a16dw.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn65lbc172a) (29 pp, sha256 `0153d8e061957f4d`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn65lbc172a16dw-datasheet.pdf)
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Its pinout is read from the 16-D",+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 29,+ "cost_usd": 0.4413,+ "at": "2026-10-07T02:54:01"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/sn65lbc172a",+ "pages": 29,+ "sha256": "0153d8e061957f4d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn65lbc172a16dw.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn65lbc172a16dw-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7f7b245d08da911f2baa0d473cfa6cf1d69cf7c245c6fd9431a6e0279e0d82b9",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}