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SN65LBC031QDR
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Texas Instruments CAN Transceivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# SN65LBC031QDR++**Texas Instruments** · CAN Transceivers · SOIC-8++SN65LBC031QDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | TX | input | Transmitter input with an internal pullup that ensures a defined output during power-up and protocol controller reset; VIH is 2 V to VCC and VIL is 0 to 0.8 V. |+| 2 | GND | power_in | Ground terminal; all voltages except the differential bus voltage are measured with respect to GND. |+| 3 | VCC | power_in | Logic supply voltage, recommended 4.5 V to 5.5 V (5 V nominal), with absolute maximum rating of 7 V. |+| 4 | RX | output | Receiver output; VOH is at least VCC - 0.5 V at IOH = -400 µA and VOL is at most 0.5 V at IOL = 1 mA. |+| 5 | REF | power_out | Reference source output at 0.45 VCC to 0.55 VCC for ±20 µA load, with output resistance of 5 to 10 kΩ. |+| 6 | CANL | bidirectional | Low-side CAN bus output driver; bus terminal voltage is limited to -2 V to 7 V recommended (-5 V to 20 V absolute maximum) and the output is short-circuit protected to battery and ground. |+| 7 | CANH | bidirectional | High-side CAN bus output driver; bus terminal voltage is limited to -2 V to 7 V recommended (-5 V to 20 V absolute maximum) and the output is short-circuit protected to battery and ground. |+| 8 | ASC | input | Adjustable slope control input; leave open or tie to GND for 500 kBaud operation, or tie to VCC to slow bus transitions for 125 kBaud operation, with VI limited to the stated TX/ASC input voltage range. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Interface |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `SN65LBC031QDR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `sn65lbc031qdr-etched.step` / `sn65lbc031qdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn65lbc031qdr.step` / `sn65lbc031qdr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn65lbc031q.pdf) (19 pp, sha256 `9c627ef1bbbd44ff`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn65lbc031qdr-datasheet.pdf)
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They are t; The datasheet describes ASC as an input but gives no absolute voltage limit specific to it. The desc"+ ],+ "pages_sent": 19,+ "cost_usd": 0.0818,+ "at": "2026-10-08T15:59:33"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn65lbc031q.pdf",+ "pages": 19,+ "sha256": "9c627ef1bbbd44ff",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn65lbc031qdr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn65lbc031qdr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3dee2fa68674e56bf447707f3349485458f61fadd8d4fc0bc3121bbfbefff3a4",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}