SLM8254AAV

@@ -26,7 +26,9 @@       "model_3d_step": "slm8254aav.step",       "lbr": "slm8254aav.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "lcsc": "C7541669"+    },     "pins": [       {         "number": "1",@@ -38,13 +40,13 @@         "number": "2",         "name": "VMP",         "type": "input",-        "description": "Voltage sense terminal between VC1 and VMP, used as the overcurrent-3 (charger over-current / charger-detect) detection input. Internally tied to VDD via ~1 MΩ (R_VMD) and to VSS via ~900 kΩ (R_VMS)."+        "description": "Voltage sense terminal between VC1 and VMP, used as the overcurrent-3 (charger over-current / charger-detect) detection input. Internally tied to VDD via ~1 M\u03a9 (R_VMD) and to VSS via ~900 k\u03a9 (R_VMS)."       },       {         "number": "3",         "name": "DOP",         "type": "output",-        "description": "Discharge-control FET gate drive terminal (CMOS output, VSS↔VDD). Drives the external discharge-path N-MOSFET; goes low to disable discharge on overdischarge or overcurrent 1/2/3."+        "description": "Discharge-control FET gate drive terminal (CMOS output, VSS\u2194VDD). Drives the external discharge-path N-MOSFET; goes low to disable discharge on overdischarge or overcurrent 1/2/3."       },       {         "number": "4",@@ -56,13 +58,13 @@         "number": "5",         "name": "CDT",         "type": "passive",-        "description": "Delay-capacitor terminal for overdischarge detection delay (t_DL) and overcurrent-1 detection delay (t_IOV1). Typical external capacitor 0.1 µF sets t_DL ≈ 100 ms, t_IOV1 ≈ 10 ms."+        "description": "Delay-capacitor terminal for overdischarge detection delay (t_DL) and overcurrent-1 detection delay (t_IOV1). Typical external capacitor 0.1 \u00b5F sets t_DL \u2248 100 ms, t_IOV1 \u2248 10 ms."       },       {         "number": "6",         "name": "CCT",         "type": "passive",-        "description": "Delay-capacitor terminal for overcharge detection delay (t_CU). Typical external capacitor 0.1 µF sets t_CU ≈ 1 s."+        "description": "Delay-capacitor terminal for overcharge detection delay (t_CU). Typical external capacitor 0.1 \u00b5F sets t_CU \u2248 1 s."       },       {         "number": "7",@@ -86,13 +88,13 @@         "number": "10",         "name": "SEL",         "type": "input",-        "description": "3/4-series select input. Tie to VSS for 3-cell mode, tie to VDD for 4-cell mode. V_SELH ≥ VDD×0.8, V_SELL ≤ VDD×0.2."+        "description": "3/4-series select input. Tie to VSS for 3-cell mode, tie to VDD for 4-cell mode. V_SELH \u2265 VDD\u00d70.8, V_SELL \u2264 VDD\u00d70.2."       },       {         "number": "11",         "name": "CTL",         "type": "input",-        "description": "Control input to enable/disable the charge and discharge FETs (COP and DOP). V_CTLH ≥ VDD×0.8, V_CTLL ≤ VDD×0.2."+        "description": "Control input to enable/disable the charge and discharge FETs (COP and DOP). V_CTLH \u2265 VDD\u00d70.8, V_CTLL \u2264 VDD\u00d70.2."       },       {         "number": "12",

@@ -70,11 +70,23 @@   <smd name="14" x="2.8625" y="0.9750" dx="1.4750" dy="0.4000" layer="1"/>   <smd name="15" x="2.8625" y="1.6250" dx="1.4750" dy="0.4000" layer="1"/>   <smd name="16" x="2.8625" y="2.2750" dx="1.4750" dy="0.4000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-3.8600" y="2.2800"/>+    <vertex x="-4.1900" y="2.0400"/>+    <vertex x="-4.1900" y="2.5200"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-1.2000" y="2.5000"/>+    <vertex x="2.2000" y="2.5000"/>+    <vertex x="2.2000" y="-2.5000"/>+    <vertex x="-2.2000" y="-2.5000"/>+    <vertex x="-2.2000" y="1.5000"/>+  </polygon>   <wire x1="-2.3100" y1="2.7350" x2="2.3100" y2="2.7350" width="0.1200" layer="21"/>   <wire x1="2.3100" y1="-2.7350" x2="-2.3100" y2="-2.7350" width="0.1200" layer="21"/>   <text x="0" y="3.613" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-3.613" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-3.8600" y="2.2800"/><vertex x="-4.1900" y="2.0400"/><vertex x="-4.1900" y="2.5200"/></polygon></package>+</package> </packages> <symbols> <symbol name="SLM8254AAV">@@ -128,7 +140,13 @@         <connect gate="G$1" pin="SEL" pad="10"/>         <connect gate="G$1" pin="NC@2" pad="9"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="SLM8254AAV" constant="no"/>+          <attribute name="MANUFACTURER" value="SOLA IC" constant="no"/>+          <attribute name="LCSC_PN" value="C7541669" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>