← Commit history

Publish 0.2.0

Ray ·1189494119 · ·parent d7d772b
3 files changed +26−12
README.md+14
@@ -47,6 +47,20 @@ SLM8254AAV from SOLA IC, in a TSSOP-16. Pinout and pin descriptions extracted fr - Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm` - 3D model: TSSOP-16 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`slm8254aav.step`](slm8254aav.step) | 205 KB | You want the bare part, or you mark your own boards. |+| [`slm8254aav-etched.step`](slm8254aav-etched.step) | 2.3 MB | You want the part with `SLM8254AAV` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 588 faces against 255 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance  Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1
@@ -1,6 +1,6 @@ {   "slug": "slm8254aav",-  "version": "0.1.0",+  "version": "0.2.0",   "type": "component",   "description": "SOLA IC Battery Management, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "tags": [
page.json+11−11
@@ -4,7 +4,7 @@   "slug": "slm8254aav",   "title": "SLM8254AAV",   "brief": "SOLA IC Battery Management, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.2.0",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -40,13 +40,13 @@         "number": "2",         "name": "VMP",         "type": "input",-        "description": "Voltage sense terminal between VC1 and VMP, used as the overcurrent-3 (charger over-current / charger-detect) detection input. Internally tied to VDD via ~1 M\u03a9 (R_VMD) and to VSS via ~900 k\u03a9 (R_VMS)."+        "description": "Voltage sense terminal between VC1 and VMP, used as the overcurrent-3 (charger over-current / charger-detect) detection input. Internally tied to VDD via ~1 MΩ (R_VMD) and to VSS via ~900 kΩ (R_VMS)."       },       {         "number": "3",         "name": "DOP",         "type": "output",-        "description": "Discharge-control FET gate drive terminal (CMOS output, VSS\u2194VDD). Drives the external discharge-path N-MOSFET; goes low to disable discharge on overdischarge or overcurrent 1/2/3."+        "description": "Discharge-control FET gate drive terminal (CMOS output, VSS↔VDD). Drives the external discharge-path N-MOSFET; goes low to disable discharge on overdischarge or overcurrent 1/2/3."       },       {         "number": "4",@@ -58,13 +58,13 @@         "number": "5",         "name": "CDT",         "type": "passive",-        "description": "Delay-capacitor terminal for overdischarge detection delay (t_DL) and overcurrent-1 detection delay (t_IOV1). Typical external capacitor 0.1 \u00b5F sets t_DL \u2248 100 ms, t_IOV1 \u2248 10 ms."+        "description": "Delay-capacitor terminal for overdischarge detection delay (t_DL) and overcurrent-1 detection delay (t_IOV1). Typical external capacitor 0.1 µF sets t_DL ≈ 100 ms, t_IOV1 ≈ 10 ms."       },       {         "number": "6",         "name": "CCT",         "type": "passive",-        "description": "Delay-capacitor terminal for overcharge detection delay (t_CU). Typical external capacitor 0.1 \u00b5F sets t_CU \u2248 1 s."+        "description": "Delay-capacitor terminal for overcharge detection delay (t_CU). Typical external capacitor 0.1 µF sets t_CU ≈ 1 s."       },       {         "number": "7",@@ -88,13 +88,13 @@         "number": "10",         "name": "SEL",         "type": "input",-        "description": "3/4-series select input. Tie to VSS for 3-cell mode, tie to VDD for 4-cell mode. V_SELH \u2265 VDD\u00d70.8, V_SELL \u2264 VDD\u00d70.2."+        "description": "3/4-series select input. Tie to VSS for 3-cell mode, tie to VDD for 4-cell mode. V_SELH ≥ VDD×0.8, V_SELL ≤ VDD×0.2."       },       {         "number": "11",         "name": "CTL",         "type": "input",-        "description": "Control input to enable/disable the charge and discharge FETs (COP and DOP). V_CTLH \u2265 VDD\u00d70.8, V_CTLL \u2264 VDD\u00d70.2."+        "description": "Control input to enable/disable the charge and discharge FETs (COP and DOP). V_CTLH ≥ VDD×0.8, V_CTLL ≤ VDD×0.2."       },       {         "number": "12",@@ -198,9 +198,9 @@     "docs/hero.png",     "docs/slm8254aav-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "SOLA IC Battery Management, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D." }\ No newline at end of file