sit65hvd75dr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
sit65hvd75dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
sit65hvd75dr: laser-etched CAD + chip hero (factory 2.0.0 backfill)
sit65hvd75dr: backfill missing artifacts (variants)
sit65hvd75dr: publish the laser-etched STEP alongside the bare one
sit65hvd75dr: factory component page (tier=lcsc)
Initial commit: component/sit65hvd75dr