component
SIT1050T
Public Made by Adomby adom
SIT CAN Controllers, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C313021). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+30−10
page.json+10−8@@ -26,13 +26,15 @@ "model_3d_step": "sit1050t.step", "lbr": "sit1050t.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C313021"+ }, "pins": [ { "number": "1", "name": "TXD", "type": "input",- "description": "Transmit data input from the CAN controller. CMOS-level logic input (VIH ≥ 2 V, VIL ≤ 0.8 V) with internal pull-up (IIL = -10 to -50 µA at VI = 0 V; IIH = ±2 µA at VI = VCC). A low level drives the bus dominant; high or open leaves the bus recessive. A dominant time-out (typ. 450 µs) prevents the bus from being held dominant indefinitely."+ "description": "Transmit data input from the CAN controller. CMOS-level logic input (VIH \u2265 2 V, VIL \u2264 0.8 V) with internal pull-up (IIL = -10 to -50 \u00b5A at VI = 0 V; IIH = \u00b12 \u00b5A at VI = VCC). A low level drives the bus dominant; high or open leaves the bus recessive. A dominant time-out (typ. 450 \u00b5s) prevents the bus from being held dominant indefinitely." }, { "number": "2",@@ -44,37 +46,37 @@ "number": "3", "name": "VCC", "type": "power_in",- "description": "+5 V supply voltage input (recommended 4.5-5.5 V, abs-max -0.3 to +6 V). Typical supply current is ~6 mA in recessive/silent state and ~50 mA (max 70 mA) in dominant state with 60 Ω load."+ "description": "+5 V supply voltage input (recommended 4.5-5.5 V, abs-max -0.3 to +6 V). Typical supply current is ~6 mA in recessive/silent state and ~50 mA (max 70 mA) in dominant state with 60 \u03a9 load." }, { "number": "4", "name": "RXD", "type": "output",- "description": "Receive data output to the CAN controller; reads out the differential state of the CAN bus. Push-pull CMOS output (VOH ≥ 4 V at IO = -2 mA, VOL ≤ 0.4 V at IO = 2 mA). LOW = dominant bus, HIGH = recessive bus."+ "description": "Receive data output to the CAN controller; reads out the differential state of the CAN bus. Push-pull CMOS output (VOH \u2265 4 V at IO = -2 mA, VOL \u2264 0.4 V at IO = 2 mA). LOW = dominant bus, HIGH = recessive bus." }, { "number": "5", "name": "Vref", "type": "output",- "description": "Reference voltage output at 0.5·VCC (spec 0.4·VCC to 0.6·VCC) capable of sourcing/sinking |IO| ≤ 50 µA. Provides a stable common-mode reference for the CAN controller or bus termination bias."+ "description": "Reference voltage output at 0.5\u00b7VCC (spec 0.4\u00b7VCC to 0.6\u00b7VCC) capable of sourcing/sinking |IO| \u2264 50 \u00b5A. Provides a stable common-mode reference for the CAN controller or bus termination bias." }, { "number": "6", "name": "CANL", "type": "bidirectional",- "description": "LOW-level CAN bus line (differential pair with CANH). Driven low (VOL(D) 0.5-2.25 V, typ 1.5 V) in the dominant state and biased to 0.5·VCC in the recessive state. Handles DC bus voltages of -40 to +40 V and transient ±200 V (see Fig. 7); short-circuit currents are limited by internal protection."+ "description": "LOW-level CAN bus line (differential pair with CANH). Driven low (VOL(D) 0.5-2.25 V, typ 1.5 V) in the dominant state and biased to 0.5\u00b7VCC in the recessive state. Handles DC bus voltages of -40 to +40 V and transient \u00b1200 V (see Fig. 7); short-circuit currents are limited by internal protection." }, { "number": "7", "name": "CANH", "type": "bidirectional",- "description": "HIGH-level CAN bus line (differential pair with CANL). Driven high (VOH(D) 2.75-4.5 V, typ 3.5 V) in the dominant state and biased to 0.5·VCC in the recessive state. Handles DC bus voltages of -40 to +40 V and transient ±200 V; internal short-circuit and overcurrent protection."+ "description": "HIGH-level CAN bus line (differential pair with CANL). Driven high (VOH(D) 2.75-4.5 V, typ 3.5 V) in the dominant state and biased to 0.5\u00b7VCC in the recessive state. Handles DC bus voltages of -40 to +40 V and transient \u00b1200 V; internal short-circuit and overcurrent protection." }, { "number": "8", "name": "S", "type": "input",- "description": "Silent-mode control input (a.k.a. STB). LOW or open = normal (transmitter enabled); HIGH = silent mode (transmitter disabled, receiver still active). VIH ≥ 2.0 V, VIL ≤ 0.8 V; input current 15-60 µA at VS = 2 V. Enable time from silent to dominant ≤ 1 µs."+ "description": "Silent-mode control input (a.k.a. STB). LOW or open = normal (transmitter enabled); HIGH = silent mode (transmitter disabled, receiver still active). VIH \u2265 2.0 V, VIL \u2264 0.8 V; input current 15-60 \u00b5A at VS = 2 V. Enable time from silent to dominant \u2264 1 \u00b5s." } ], "provenance": {
sit1050t.lbr+20−2@@ -62,6 +62,18 @@ <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-2.6000" y="2.4700"/>+ <vertex x="-2.8400" y="2.8000"/>+ <vertex x="-2.3600" y="2.8000"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.9750" y="2.4500"/>+ <vertex x="1.9500" y="2.4500"/>+ <vertex x="1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="1.4750"/>+ </polygon> <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -70,7 +82,7 @@ <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/> <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="SIT1050T">@@ -108,7 +120,13 @@ <connect gate="G$1" pin="CANL" pad="6"/> <connect gate="G$1" pin="Vref" pad="5"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="SIT1050T" constant="no"/>+ <attribute name="MANUFACTURER" value="SIT" constant="no"/>+ <attribute name="LCSC_PN" value="C313021" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>