component
SI53354A-D01AMR
Public Made by Adomby adom
SKYWORKS SILICON LABS Clock Buffers, Drivers, Distributors, QFN-40-EP(6x6). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
page.json+368−8@@ -1,13 +1,378 @@ {+ "schema_version": 1,+ "type": "component", "slug": "si53354a-d01amr",+ "title": "SI53354A-D01AMR",+ "brief": "SKYWORKS SILICON LABS Clock Buffers, Drivers, Distributors, QFN-40-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "SKYWORKS SILICON LABS Clock Buffers, Drivers, Distributors, QFN-40-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "clock-timing", "si53354a-d01amr" ],+ "component": {+ "mpn": "SI53354A-D01AMR",+ "manufacturer": "SKYWORKS SILICON LABS",+ "package": "QFN-40-EP(6x6)",+ "pin_count": 41,+ "category": "Clock/Timing",+ "subcategory": "Clock Buffers, Drivers, Distributors",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588927577888710656",+ "parts": {+ "symbol": "si53354a-d01amr.kicad_sym",+ "footprint": "si53354a-d01amr.kicad_mod",+ "model_3d": "si53354a-d01amr.glb",+ "model_3d_step": "si53354a-d01amr.step",+ "lbr": "si53354a-d01amr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "VDD_DIG",+ "type": "power_in",+ "description": "Digital core supply, 1.8-3.3 V. Must be tied to the same voltage rail as VDD and VDDA."+ },+ {+ "number": "2",+ "name": "CLKIN_1",+ "type": "input",+ "description": "Clock input 1 (positive). Accepts differential or single-ended clocks; high-impedance and must be externally terminated. Selected when Input_SEL=0."+ },+ {+ "number": "3",+ "name": "CLKIN_1b",+ "type": "input",+ "description": "Clock input 1 (complementary). Paired with CLKIN_1 for differential input; may be tied for single-ended use. Leave floating only if input configured as 'Unused' in ClockBuilder Pro."+ },+ {+ "number": "4",+ "name": "VDD",+ "type": "power_in",+ "description": "Core supply, 1.8-3.3 V. Must be tied to same rail as VDDA and VDD_DIG."+ },+ {+ "number": "5",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "6",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "7",+ "name": "CLKIN_2",+ "type": "input",+ "description": "Clock input 2 (positive). Accepts differential or single-ended clocks; high-impedance and must be externally terminated. Selected when Input_SEL=1."+ },+ {+ "number": "8",+ "name": "CLKIN_2b",+ "type": "input",+ "description": "Clock input 2 (complementary). Paired with CLKIN_2. Leave floating only if input configured as 'Unused' in ClockBuilder Pro."+ },+ {+ "number": "9",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog core supply, 1.8-3.3 V. Must be tied to same rail as VDD and VDD_DIG."+ },+ {+ "number": "10",+ "name": "Format_SEL0",+ "type": "input",+ "description": "Output clock format selection input, LSB. Used with Format_SEL1 (pin 19) to pick differential/LVCMOS format per Section 3.2."+ },+ {+ "number": "11",+ "name": "GND",+ "type": "power_in",+ "description": "Ground. Tie to system ground."+ },+ {+ "number": "12",+ "name": "GND",+ "type": "power_in",+ "description": "Ground. Tie to system ground."+ },+ {+ "number": "13",+ "name": "OUT0b",+ "type": "output",+ "description": "Output clock 0 (complementary). Programmable swing and common-mode; supports differential and LVCMOS formats. Leave unconnected if unused."+ },+ {+ "number": "14",+ "name": "OUT0",+ "type": "output",+ "description": "Output clock 0 (positive). Programmable swing and common-mode; supports differential and LVCMOS formats. Leave unconnected if unused."+ },+ {+ "number": "15",+ "name": "VDDO0",+ "type": "power_in",+ "description": "Output supply for OUT0 driver, 1.8-3.3 V. Sets OUT0 signal swing/format rail. Leave unconnected or tie high with driver disabled if OUT0 is unused."+ },+ {+ "number": "16",+ "name": "OUT1b",+ "type": "output",+ "description": "Output clock 1 (complementary). Programmable swing and common-mode. Leave unconnected if unused."+ },+ {+ "number": "17",+ "name": "OUT1",+ "type": "output",+ "description": "Output clock 1 (positive). Programmable swing and common-mode. Leave unconnected if unused."+ },+ {+ "number": "18",+ "name": "VDDO1",+ "type": "power_in",+ "description": "Output supply for OUT1 driver, 1.8-3.3 V. Leave unconnected or tie high with driver disabled if OUT1 is unused."+ },+ {+ "number": "19",+ "name": "Format_SEL1",+ "type": "input",+ "description": "Output clock format selection input, MSB. Used with Format_SEL0 (pin 10) per Section 3.2."+ },+ {+ "number": "20",+ "name": "Input_SEL",+ "type": "input",+ "description": "Input clock mux select. 0 = CLKIN_1/CLKIN_1b; 1 = CLKIN_2/CLKIN_2b."+ },+ {+ "number": "21",+ "name": "OUT2b",+ "type": "output",+ "description": "Output clock 2 (complementary). Programmable swing and common-mode. Leave unconnected if unused."+ },+ {+ "number": "22",+ "name": "OUT2",+ "type": "output",+ "description": "Output clock 2 (positive). Programmable swing and common-mode. Leave unconnected if unused."+ },+ {+ "number": "23",+ "name": "OUT3b",+ "type": "output",+ "description": "Output clock 3 (complementary). Programmable swing and common-mode. Leave unconnected if unused."+ },+ {+ "number": "24",+ "name": "OUT3",+ "type": "output",+ "description": "Output clock 3 (positive). Programmable swing and common-mode. Leave unconnected if unused."+ },+ {+ "number": "25",+ "name": "VDDO2",+ "type": "power_in",+ "description": "Shared output supply for OUT2 and OUT3 drivers, 1.8-3.3 V. Leave unconnected or tie high with drivers disabled if both outputs are unused."+ },+ {+ "number": "26",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "27",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "28",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "29",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "30",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "31",+ "name": "OEb_OUT0",+ "type": "input",+ "description": "Active-low output enable for OUT0. 0 = output enabled; 1 = output disabled."+ },+ {+ "number": "32",+ "name": "OEb_OUT1",+ "type": "input",+ "description": "Active-low output enable for OUT1. 0 = output enabled; 1 = output disabled."+ },+ {+ "number": "33",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "34",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "35",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "36",+ "name": "OEb_OUT2",+ "type": "input",+ "description": "Active-low output enable for OUT2. 0 = output enabled; 1 = output disabled."+ },+ {+ "number": "37",+ "name": "OEb_OUT3",+ "type": "input",+ "description": "Active-low output enable for OUT3. 0 = output enabled; 1 = output disabled."+ },+ {+ "number": "38",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "39",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "40",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Do not connect this pin to anything."+ },+ {+ "number": "41",+ "name": "GND",+ "type": "power_in",+ "description": "Center exposed pad. Electrical and thermal ground; must be soldered to the board ground plane for proper operation."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588927577888710656",+ "pages": 63,+ "sha256": "c46ddd6abc7831e4",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 41,+ "described": 41,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "SKYWORKS SILICON LABS",+ "Package": "QFN-40-EP(6x6)",+ "Category": "Clock/Timing",+ "Pins": "41"+ }+ },+ "variants": [+ {+ "mpn": "SI53354A-D01AMR",+ "kind": "packaging"+ },+ {+ "mpn": "Si53354A-D01AMR",+ "kind": "packaging"+ },+ {+ "mpn": "Si53354BD12750-AM",+ "kind": "unknown"+ },+ {+ "mpn": "Si53354BD-xxxxx-AM",+ "kind": "unknown"+ },+ {+ "mpn": "Si53350A-D01AM",+ "kind": "unknown"+ },+ {+ "mpn": "Si53350BD12748-AM",+ "kind": "unknown"+ },+ {+ "mpn": "Si53350BD-xxxxx-AM",+ "kind": "unknown"+ },+ {+ "mpn": "Si53358A-D01AM",+ "kind": "unknown"+ },+ {+ "mpn": "Si53358BD12749-AM",+ "kind": "unknown"+ },+ {+ "mpn": "Si53358BD-xxxxx-AM",+ "kind": "unknown"+ },+ {+ "mpn": "Si53352A-D01AM",+ "kind": "unknown"+ },+ {+ "mpn": "Si53352BD12751-AM",+ "kind": "unknown"+ },+ {+ "mpn": "Si53352BD-xxxxx-AM",+ "kind": "unknown"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "si53354a-d01amr"+ ],+ "discovery_pitch": "SI53354A-D01AMR (SKYWORKS SILICON LABS) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +390,5 @@ "docs/si53354a-d01amr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }