component
SI3402-B-GMR
Public Made by Adomby adom
SKYWORKS SILICON LABS Ethernet Controllers, QFN-20-EP(5x5). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+204−8@@ -1,13 +1,214 @@ {+ "schema_version": 1,+ "type": "component", "slug": "si3402-b-gmr",+ "title": "SI3402-B-GMR",+ "brief": "SKYWORKS SILICON LABS Ethernet Controllers, QFN-20-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "SKYWORKS SILICON LABS Ethernet Controllers, QFN-20-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "interface", "si3402-b-gmr" ],+ "component": {+ "mpn": "SI3402-B-GMR",+ "manufacturer": "SKYWORKS SILICON LABS",+ "package": "QFN-20-EP(5x5)",+ "pin_count": 21,+ "category": "Interface",+ "subcategory": "Ethernet Controllers",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/dbaa76bfdb9fa8bb2d89b269c464479d.pdf",+ "parts": {+ "symbol": "si3402-b-gmr.kicad_sym",+ "footprint": "si3402-b-gmr.kicad_mod",+ "model_3d": "si3402-b-gmr.glb",+ "model_3d_step": "si3402-b-gmr.step",+ "lbr": "si3402-b-gmr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "EROUT",+ "type": "output",+ "description": "Error-amplifier output and PWM input; directly connected to opto-coupler in isolated application."+ },+ {+ "number": "2",+ "name": "SSFT",+ "type": "unconnected",+ "description": "Legacy Si3402-A soft-start pin. The non-isolated soft-start function is internal on the Si3402-B, so this pin is not internally connected. Legacy components/connections are harmless and may be retained or deleted."+ },+ {+ "number": "3",+ "name": "VDD",+ "type": "power_out",+ "description": "5 V supply rail for the switcher; provides drive for the opto-coupler."+ },+ {+ "number": "4",+ "name": "ISOSSFT",+ "type": "unconnected",+ "description": "Legacy Si3402-A isolated soft-start pin. The isolated soft-start function is internal on the Si3402-B, so this pin is not internally connected. Legacy components/connections are harmless and may be retained or deleted."+ },+ {+ "number": "5",+ "name": "PLOSS",+ "type": "output",+ "description": "Early power-loss indicator; open-drain output that is pulled to VPOS when VPORT is applied. Threshold is VPOS - (greater of CT1/CT2 or SP1/SP2), typ 1.5 V."+ },+ {+ "number": "6",+ "name": "RDET",+ "type": "passive",+ "description": "Input pin for external precision detection resistor; also used for establishing the absolute current reference for the device."+ },+ {+ "number": "7",+ "name": "HSO",+ "type": "power_out",+ "description": "Hotswap switch output; connects to VNEG through the hotswap switch. Externally tied to VSS2 (the switcher negative supply rail)."+ },+ {+ "number": "8",+ "name": "RCL",+ "type": "passive",+ "description": "Input pin for external precision classification resistor (RCLASS); float if optional RCLASS is unused. Sets the PoE class current (Class 0-3)."+ },+ {+ "number": "9",+ "name": "VNEG",+ "type": "power_in",+ "description": "Rectified high-voltage supply, negative rail. Must be connected to the thermal PAD node (VNEG) on the package bottom. The thermal pad must connect to VNEG (pin 9) as well as a >=2 in^2 heat spreader plane using a minimum of nine thermal vias."+ },+ {+ "number": "10",+ "name": "SP2",+ "type": "power_in",+ "description": "High-voltage supply input from spare pair; polarity-insensitive. Paired with SP1 for the PoE spare-pair input to the internal diode bridge."+ },+ {+ "number": "11",+ "name": "SP1",+ "type": "power_in",+ "description": "High-voltage supply input from spare pair; polarity-insensitive. Paired with SP2 for the PoE spare-pair input to the internal diode bridge."+ },+ {+ "number": "12",+ "name": "VPOSF",+ "type": "power_out",+ "description": "Rectified high-voltage supply, positive rail (force node). Output of the internal rectification/protection block."+ },+ {+ "number": "13",+ "name": "CT2",+ "type": "power_in",+ "description": "High-voltage supply input from center-tap of Ethernet transformer; polarity-insensitive. Paired with CT1 for the PoE center-tap input to the internal diode bridge."+ },+ {+ "number": "14",+ "name": "CT1",+ "type": "power_in",+ "description": "High-voltage supply input from center-tap of Ethernet transformer; polarity-insensitive. Paired with CT2 for the PoE center-tap input to the internal diode bridge."+ },+ {+ "number": "15",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground. In new designs, VSSA may be left floating for easier PCB layout, with VSS2 used as the analog ground. VSSA is internally connected to VSS2."+ },+ {+ "number": "16",+ "name": "VPOSS",+ "type": "unconnected",+ "description": "Legacy Si3402-A positive-rail sense node. The positive-rail sense-node function is no longer implemented, so this pin is not internally connected."+ },+ {+ "number": "17",+ "name": "VSS1",+ "type": "unconnected",+ "description": "Legacy Si3402-A negative supply rail. This former negative supply rail pin is no longer implemented, so this pin is not internally connected."+ },+ {+ "number": "18",+ "name": "SWO",+ "type": "power_out",+ "description": "Switching transistor output; drain of the internal switching N-FET. Peak current 2.4 A; RDS(on) typ 0.5 ohm; switcher frequency ~350 kHz."+ },+ {+ "number": "19",+ "name": "VSS2",+ "type": "power_in",+ "description": "Negative supply rail for the switcher; externally tied to HSO. Also serves as the analog-ground reference for new designs (see VSSA)."+ },+ {+ "number": "20",+ "name": "FB",+ "type": "input",+ "description": "Regulated feedback input for the switcher in non-isolated (buck) applications. Sets the output voltage via an external resistor divider."+ },+ {+ "number": "PAD",+ "name": "VNEG",+ "type": "power_in",+ "description": "Exposed thermal pad; electrically the VNEG rectified-negative rail. Must be tied to pin 9 (VNEG) and to a >=2 in^2 heat-spreader plane through a minimum of nine thermal vias for thermal performance."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/dbaa76bfdb9fa8bb2d89b269c464479d.pdf",+ "pages": 22,+ "sha256": "fd0e50110e6c9606",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "SKYWORKS SILICON LABS",+ "Package": "QFN-20-EP(5x5)",+ "Category": "Interface",+ "Pins": "21"+ }+ },+ "variants": [+ {+ "mpn": "SI3402-B-GMR",+ "kind": "packaging"+ },+ {+ "mpn": "Si3402-B-GMR",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "si3402-b-gmr"+ ],+ "discovery_pitch": "SI3402-B-GMR (SKYWORKS SILICON LABS) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +226,5 @@ "docs/si3402-b-gmr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }