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Initial commit: component/sgm836-adjxn6g

Ray ·7cd0095528 ·29d ago
2 files changed +83
README.mdadded+49
@@ -0,0 +1,49 @@+# SGM836-ADJXN6G++**SGMICRO** · Supervisor and Reset ICs · SOT-23-6++SGM836-ADJXN6G from SGMICRO, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | nRESET | output | Active-low, open-drain reset output. Held low while SENSE < VIT or nMR is logic low, and remains low for the reset timeout period tD after both conditions are cleared. Requires an external 10kΩ to 1MΩ pull-up (to a rail up to 6.5V, may exceed VDD). Sink capability IOL = 0.4mA at VDD ≥ 1.3V and 1mA at VDD ≥ 1.8V; leakage 1µA max when de-asserted. |+| 2 | GND | power_in | Device ground reference (0V). |+| 3 | nMR | input | Active-low manual reset input. Pulling nMR low asserts nRESET. Internally pulled up to VDD by a ~100kΩ resistor (50kΩ min). Logic thresholds VIL ≤ 0.3×VDD, VIH ≥ 0.7×VDD; propagation delay to nRESET is 250ns typ and requires a min pulse width tnMR ≥ 100ns. |+| 4 | CT | input | Reset timeout delay programming pin. Leave open for the fixed ~20ms delay; connect a 40kΩ to 200kΩ resistor from CT to VDD for a ~300ms fixed delay; or connect a capacitor ≥ 100pF from CT to GND for a programmable 1.25ms to 10s delay. Internal CT source ramps to VTH-RAMP ≈ 1.206V; absolute max range −0.3V to VDD + 0.3V. |+| 5 | SENSE | input | Dedicated voltage monitor input. nRESET is asserted when VSENSE falls below the negative-going threshold VIT (0.405V nominal for the ADJ variant; factory-set to 0.9V-5V on fixed versions). On the ADJ version input current is ±25nA max; VSENSE range 0V to 6.5V; SENSE-to-nRESET delay tRP0 ≈ 100µs. |+| 6 | VDD | power_in | Supply voltage input, operating range 1.65V to 6.5V (absolute max 7V). Quiescent current IDD ≈ 0.6µA typ at VDD = 3.3V and 0.9µA typ at VDD = 6.5V with nRESET not asserted and CT open. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | SGMICRO |+| Package | SOT-23-6 |+| Category | PMIC |+| Pins | 6 |++## Ordering variants++Same part, different packaging or reel option.++- `SGM836-ADJXN6G/TR`+- `SGM836-ADJXTDI6G/TR`+- `SGM836-ADJXN6GXTDI6G/TR`++## CAD (KiCad official)++- Symbol: `SGM836-ADJXN6G`+- Footprint: `Package_TO_SOT_SMD:SOT-23-6`+- 3D model: SOT-23-6 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [SGMICRO datasheet](docs/sgm836-adjxn6g-datasheet.pdf) (12 pp, sha256 `aa80338ab058417f`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sgm836-adjxn6g-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "sgm836-adjxn6g",+  "version": "0.1.0",+  "type": "component",+  "description": "SGMICRO Supervisor and Reset ICs, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "sgm836-adjxn6g"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sgm836-adjxn6g.kicad_sym",+    "sgm836-adjxn6g.kicad_mod",+    "sgm836-adjxn6g.glb",+    "sgm836-adjxn6g.step",+    "sgm836-adjxn6g.lbr",+    "docs/hero.png",+    "docs/sgm836-adjxn6g-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file