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sgm836-adjxn6g: factory component page (tier=lcsc)

Ray ·13335fac5f ·29d ago ·parent cb4dbbf
1 file changed +118−8
page.json+118−8
@@ -1,13 +1,128 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sgm836-adjxn6g",+  "title": "SGM836-ADJXN6G",+  "brief": "SGMICRO Supervisor and Reset ICs, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "SGMICRO Supervisor and Reset ICs, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "pmic",     "sgm836-adjxn6g"   ],+  "component": {+    "mpn": "SGM836-ADJXN6G",+    "manufacturer": "SGMICRO",+    "package": "SOT-23-6",+    "pin_count": 6,+    "category": "PMIC",+    "subcategory": "Supervisor and Reset ICs",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2302061830_SGMICRO-SGM836-ADJXN6G-TR_C5152490.pdf",+    "parts": {+      "symbol": "sgm836-adjxn6g.kicad_sym",+      "footprint": "sgm836-adjxn6g.kicad_mod",+      "model_3d": "sgm836-adjxn6g.glb",+      "model_3d_step": "sgm836-adjxn6g.step",+      "lbr": "sgm836-adjxn6g.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "nRESET",+        "type": "output",+        "description": "Active-low, open-drain reset output. Held low while SENSE < VIT or nMR is logic low, and remains low for the reset timeout period tD after both conditions are cleared. Requires an external 10k\u03a9 to 1M\u03a9 pull-up (to a rail up to 6.5V, may exceed VDD). Sink capability IOL = 0.4mA at VDD \u2265 1.3V and 1mA at VDD \u2265 1.8V; leakage 1\u00b5A max when de-asserted."+      },+      {+        "number": "2",+        "name": "GND",+        "type": "power_in",+        "description": "Device ground reference (0V)."+      },+      {+        "number": "3",+        "name": "nMR",+        "type": "input",+        "description": "Active-low manual reset input. Pulling nMR low asserts nRESET. Internally pulled up to VDD by a ~100k\u03a9 resistor (50k\u03a9 min). Logic thresholds VIL \u2264 0.3\u00d7VDD, VIH \u2265 0.7\u00d7VDD; propagation delay to nRESET is 250ns typ and requires a min pulse width tnMR \u2265 100ns."+      },+      {+        "number": "4",+        "name": "CT",+        "type": "input",+        "description": "Reset timeout delay programming pin. Leave open for the fixed ~20ms delay; connect a 40k\u03a9 to 200k\u03a9 resistor from CT to VDD for a ~300ms fixed delay; or connect a capacitor \u2265 100pF from CT to GND for a programmable 1.25ms to 10s delay. Internal CT source ramps to VTH-RAMP \u2248 1.206V; absolute max range \u22120.3V to VDD + 0.3V."+      },+      {+        "number": "5",+        "name": "SENSE",+        "type": "input",+        "description": "Dedicated voltage monitor input. nRESET is asserted when VSENSE falls below the negative-going threshold VIT (0.405V nominal for the ADJ variant; factory-set to 0.9V-5V on fixed versions). On the ADJ version input current is \u00b125nA max; VSENSE range 0V to 6.5V; SENSE-to-nRESET delay tRP0 \u2248 100\u00b5s."+      },+      {+        "number": "6",+        "name": "VDD",+        "type": "power_in",+        "description": "Supply voltage input, operating range 1.65V to 6.5V (absolute max 7V). Quiescent current IDD \u2248 0.6\u00b5A typ at VDD = 3.3V and 0.9\u00b5A typ at VDD = 6.5V with nRESET not asserted and CT open."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2302061830_SGMICRO-SGM836-ADJXN6G-TR_C5152490.pdf",+        "pages": 12,+        "sha256": "aa80338ab058417f",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 6,+        "described": 6,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "SGMICRO",+      "Package": "SOT-23-6",+      "Category": "PMIC",+      "Pins": "6"+    }+  },+  "variants": [+    {+      "mpn": "SGM836-ADJXN6G/TR",+      "kind": "packaging"+    },+    {+      "mpn": "SGM836-ADJXTDI6G/TR",+      "kind": "unknown"+    },+    {+      "mpn": "SGM836-ADJXN6GXTDI6G/TR",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "sgm836-adjxn6g"+  ],+  "discovery_pitch": "SGM836-ADJXN6G (SGMICRO) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +140,5 @@     "docs/sgm836-adjxn6g-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file