SGM6132YPS8G

@@ -0,0 +1,48 @@+# SGM6132YPS8G++**SGMICRO** · DC-DC Converters · SOIC-8-EP++SGM6132YPS8G from SGMICRO, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BS | passive | High-side Gate Drive Boost Input. BS supplies the driver for the high-side N-channel MOSFET switch. Connect a 10nF or greater capacitor from SW to BS to bootstrap the high-side switch. A 10Ω resistor between SW and the BS cap is strongly recommended to reduce SW spike voltage. |+| 2 | IN | power_in | Power Input. Supplies power to the IC and the step-down converter switches. Drive with a 4.5V to 28.5V source. Bypass IN to GND with a sufficiently large capacitor (22µF ceramic recommended) to eliminate input noise. |+| 3 | SW | power_out | Power Switching Output. Switching node that supplies power to the output. Connect the output LC filter from SW to the load. A bootstrap capacitor is required from SW to BS to power the high-side switch. |+| 4 | GND | power_in | Ground. The exposed pad on the backside must be connected to pin 4 and tied to the GND plane for proper thermal and electrical performance. |+| 5 | FB | input | Feedback Input. The voltage at this pin is regulated to 0.8V (typ). Connect to the resistor divider between output and ground to set the output voltage. |+| 6 | COMP | output | Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND to compensate the loop; in some cases an additional capacitor from COMP to GND is required. |+| 7 | EN | input | Enable Input. Digital input that turns the regulator on (VIH ≥ 1.2V) or off (VIL ≤ 0.4V). When EN is low the output is discharged and the IC is off. Has an internal ~1.4µA pull-up current so leaving EN unconnected causes automatic startup. |+| 8 | SS | passive | Soft-Start Control Input. Connect a capacitor from SS to GND to set the soft-start period; a 0.1µF capacitor sets ≈10ms soft-start. Leave SS unconnected to disable the soft-start feature. |+| EP | GND | power_in | Power Ground Exposed Pad. Must be connected to the GND plane and tied to pin 4 for thermal dissipation and ground return. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | SGMICRO |+| Package | SOIC-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `SGM6132YPS8GYPS8G/TR`++## CAD (KiCad official)++- Symbol: `SGM6132YPS8G`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [SGMICRO datasheet](docs/sgm6132yps8g-datasheet.pdf) (14 pp, sha256 `d83cfb4e5526354d`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sgm6132yps8g-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "sgm6132yps8g",+  "version": "0.1.0",+  "type": "component",+  "description": "SGMICRO DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "sgm6132yps8g"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sgm6132yps8g.kicad_sym",+    "sgm6132yps8g.kicad_mod",+    "sgm6132yps8g.glb",+    "sgm6132yps8g.step",+    "sgm6132yps8g.lbr",+    "docs/hero.png",+    "docs/sgm6132yps8g-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file