← Commit history

Initial commit: component/sdv1005e5r5c500nptf

Ray ·5efaa3081c ·1mo ago
2 files changed +143
README.mdadded+38
@@ -0,0 +1,38 @@+# SDV1005E5R5C500NPTF++**Sunlord** · Varistors · 0402++SDV1005E5R5C500NPTF from Sunlord, in a 0402. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | T1 | passive | End-cap electrode 1 of the non-polarized ESD-protection chip varistor; one of two symmetric terminals; max DC working voltage 5.5 V (product code 5R5, page 1 product-identification table); Sn-plated termination (code N); rated for operating temperature −55 °C to +125 °C (page 1). |+| 2 | T2 | passive | End-cap electrode 2 of the non-polarized ESD-protection chip varistor; electrically symmetric with pin 1; ~50 pF typical inter-terminal capacitance at 1 MHz as decoded from product code C500 via the EIA 3-digit convention (page 1 example: C121 = 120 pF); Sn-plated termination (code N). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Sunlord |+| Package | 0402 |+| Category | Circuit Protection |+| Pins | 2 |++## CAD (KiCad official)++- Symbol: `SDV1005E5R5C500NPTF`+- Footprint: `Resistor_SMD:R_0402_1005Metric`+- 3D model: 0402 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Sunlord datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755185815490715648) (6 pp, sha256 `ecc8abb126e1552c`, retrieved 2026-09-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-4-6` (vision), consensus `claude-opus-4-7` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sdv1005e5r5c500nptf-datasheet.pdf)
page.jsonadded+105
@@ -0,0 +1,105 @@+{+  "slug": "sdv1005e5r5c500nptf",+  "version": "0.1.0",+  "type": "component",+  "description": "Sunlord Varistors, 0402. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "circuit protection",+    "sdv1005e5r5c500nptf",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sdv1005e5r5c500nptf.kicad_sym",+    "sdv1005e5r5c500nptf.kicad_mod",+    "sdv1005e5r5c500nptf.glb",+    "sdv1005e5r5c500nptf.step",+    "sdv1005e5r5c500nptf.lbr",+    "docs/hero.png",+    "docs/sdv1005e5r5c500nptf-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "SDV1005E5R5C500NPTF",+    "manufacturer": "Sunlord",+    "package": "0402",+    "pin_count": 2,+    "category": "Circuit Protection",+    "subcategory": "Varistors",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755185815490715648",+    "parts": {+      "symbol": "sdv1005e5r5c500nptf.kicad_sym",+      "footprint": "sdv1005e5r5c500nptf.kicad_mod",+      "model_3d": "sdv1005e5r5c500nptf.glb",+      "model_3d_step": "sdv1005e5r5c500nptf.step",+      "lbr": "sdv1005e5r5c500nptf.lbr"+    },+    "distributor_links": {+      "lcsc": "C279822"+    },+    "pins": [+      {+        "number": "1",+        "name": "T1",+        "type": "passive",+        "description": "End-cap electrode 1 of the non-polarized ESD-protection chip varistor; one of two symmetric terminals; max DC working voltage 5.5 V (product code 5R5, page 1 product-identification table); Sn-plated termination (code N); rated for operating temperature −55 °C to +125 °C (page 1)."+      },+      {+        "number": "2",+        "name": "T2",+        "type": "passive",+        "description": "End-cap electrode 2 of the non-polarized ESD-protection chip varistor; electrically symmetric with pin 1; ~50 pF typical inter-terminal capacitance at 1 MHz as decoded from product code C500 via the EIA 3-digit convention (page 1 example: C121 = 120 pF); Sn-plated termination (code N)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-sonnet-4-6",+        "primary_mode": "vision",+        "consensus_model": "claude-opus-4-7",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The SDV1005E5R5C500NPTF (5R5 = 5.5 V varistor voltage) does not appear as an explicit row in the SDV; Capacitance code interpretation: page 1 gives the example C121 = 120 pF (standard EIA 3-digit code: ; Pin numbers '1' and '2' are conventional for a 2-terminal leaded/chip package. The dimensional drawi",+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 6,+        "cost_usd": 0.3689,+        "at": "2026-09-17T19:44:19"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755185815490715648",+        "pages": 6,+        "sha256": "ecc8abb126e1552c",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 2,+        "described": 2,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file