SCT2650STER

@@ -0,0 +1,49 @@+# SCT2650STER++**SCT** · DC-DC Converters · ESOP-8++SCT2650STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BOOT | passive | Power supply bias for high-side power MOSFET gate driver. Connect a 0.1uF bootstrap capacitor from BOOT to SW. The bootstrap capacitor is charged when SW is low. Absolute max 71V; BOOT-SW UVLO ~2.52V. |+| 2 | VIN | power_in | Input supply voltage, 4.5V to 60V operating range (absolute max 65V). Connect a local bypass capacitor from VIN to GND; path from VIN to the high-frequency bypass cap and GND must be as short as possible. |+| 3 | EN | input | Enable pin with internal pull-up current source (~1µA at 1V, ~4µA at 1.5V). Pull below 1.05V to disable; float or tie to VIN to enable. A resistor divider from VIN to GND at EN sets the input UVLO threshold. Enable high threshold ~1.2V. |+| 4 | RT/CLK | bidirectional | Sets internal oscillator frequency (100kHz-1.2MHz) via a resistor to GND, or accepts an external clock for PLL synchronization. If external clocking edges stop, operation automatically reverts to the resistor-programmed frequency. RRT=200kΩ → ~500kHz. |+| 5 | FB | input | Inverting input of the trans-conductance error amplifier. External resistor divider from VOUT to GND sets the output voltage; FB is regulated to the internal 0.8V (±1%) reference. Absolute max 6V. |+| 6 | COMP | output | Error amplifier output. Connect the external frequency loop compensation network (R-C to GND) here. Trans-conductance ~300µS; source/sink ~30µA; clamps ~0.47V (low) and ~2.25V (high). Absolute max 6V. |+| 7 | GND | power_in | Device ground return. Tie to the ground plane; the thermal pad must also be connected to this ground for proper operation and thermal performance. |+| 8 | SW | power_out | Regulator switching node - source of the internal 80mΩ high-side MOSFET. Connect to the external power inductor. Absolute max -1V to 65V; supports up to 5A continuous output current. |+| 9 | Thermal Pad | power_in | Exposed die-attach pad for heat dissipation. Electrically must be connected to the GND pin and tied to the PCB ground plane for proper operation and optimized thermal performance (θja ~42 °C/W). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | SCT |+| Package | ESOP-8 |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `SCT2650STERSTE`+- `SCT2650STERSTER`++## CAD (KiCad official)++- Symbol: `SCT2650STER`+- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`+- 3D model: ESOP-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [SCT datasheet](docs/sct2650ster-datasheet.pdf) (23 pp, sha256 `ecd15ccc04629605`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sct2650ster-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "sct2650ster",+  "version": "0.1.0",+  "type": "component",+  "description": "SCT DC-DC Converters, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "sct2650ster"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sct2650ster.kicad_sym",+    "sct2650ster.kicad_mod",+    "sct2650ster.glb",+    "sct2650ster.step",+    "sct2650ster.lbr",+    "docs/hero.png",+    "docs/sct2650ster-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file