component
RV4145AMT
Public Made by Adomby adom
onsemi Power Management Specialized - PMIC, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+85@@ -0,0 +1,85 @@+# RV4145AMT++**onsemi** · Power Management Specialized - PMIC · SOIC-8++RV4145AMT from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VFB | input | Sense amplifier negative input; internal 10 kΩ resistor R1 connects it to pin 3 (VREF), and the RSENSE feedback resistor connects from pin 7 to this pin. |+| 2 | +Input | input | Sense amplifier positive input; internal 10 kΩ resistor R2 to pin 3, offset voltage ±3.0 mV max at 25°C. |+| 3 | VREF | power_out | Reference voltage output at ½ VS (12.5 V min, 13.0 V typ, 14.6 V max at 25°C) used as the artificial ground for the op amp. |+| 4 | GND | power_in | Ground. |+| 5 | SCR | output | Trigger output that fires the external SCR when a fault is detected (detector on 2.8 V typ, 1.5 V min at 25°C); internal 4.7 kΩ typ resistor R3 to GND. |+| 6 | +VS | power_in | Supply input for the RV4145A circuitry with 26 V typ (25.0 to 29.2 V) shunt regulator clamp, fed from the AC line through RLINE. |+| 7 | Op Amp Output | output | Sense amplifier output; the SCR trigger fires when it exceeds ±7.2 V typ relative to pin 3. |+| 8 | NC | unconnected | No connect. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-8 |+| Category | Power Supply Chip |+| Pins | 8 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Detector Reference Voltage | | 6.8 | 7.2 | 8.1 | ±V | Pin 7 to Pin 3; IS = 1.5 mA, TA = +25°C | 3 |+| Zener Voltage | +VS | 25 | 26 | 29.2 | V | Pin 6 to Pin 4; IS = 1.5 mA, TA = +25°C | 3 |+| Reference Voltage | VREF | 12.5 | 13 | 14.6 | V | Pin 3 to Pin 4; IS = 1.5 mA, TA = +25°C | 3 |+| Quiescent Current | Is | | 450 | 750 | µA | +VS = 24 V; IS = 1.5 mA, TA = +25°C | 3 |+| Offset Voltage | | -3 | 0.5 | 3 | mV | Pin 2 to Pin 3; IS = 1.5 mA, TA = +25°C | 3 |+| +Output Voltage Swing | | 6.8 | 7.2 | 8.1 | V | Pin 7 to Pin 3; IS = 1.5 mA, TA = +25°C | 3 |+| -Output Voltage Swing | | -9.5 | -11.2 | -13.5 | V | Pin 7 to Pin 3; IS = 1.5 mA, TA = +25°C | 3 |+| Gain Bandwidth Product | | 1 | 1.8 | | MHz | f = 50 kHz; IS = 1.5 mA, TA = +25°C | 3 |+| Resistor R3 | R3 | 3.5 | 4.7 | 5.9 | kΩ | Pin 5 to Pin 4; IS = 0 mA | 3 |+| SCR Trigger Detector On | | 1.5 | 2.8 | | V | Pin 5 to Pin 4; IS = 1.5 mA, TA = +25°C | 3 |+| SCR Trigger Detector Off | | 0 | 1 | 10 | mV | IS = 1.5 mA, TA = +25°C | 3 |+| Detector Reference Voltage | | 6.5 | 7.2 | 8.3 | ±V | Pin 7 to Pin 3; IS = 1.5 mA, -35°C ≤ TA ≤ +85°C | 3 |+| Zener Voltage | +VS | 24 | 26 | 30 | V | Pin 6 to Pin 4; IS = 1.5 mA, -35°C ≤ TA ≤ +85°C | 3 |+| Reference Voltage | VREF | 12 | 13 | 15 | V | Pin 3 to Pin 4; IS = 1.5 mA, -35°C ≤ TA ≤ +85°C | 3 |+| Offset Voltage | | -5 | 0.5 | 5 | mV | Pin 2 to Pin 3; IS = 1.5 mA, -35°C ≤ TA ≤ +85°C | 3 |+| +Output Voltage Swing | | 6.5 | 7.2 | 8.3 | V | Pin 7 to Pin 3; IS = 1.5 mA, -35°C ≤ TA ≤ +85°C | 3 |+| -Output Voltage Swing | | -9 | -11.2 | -14 | V | Pin 7 to Pin 3; IS = 1.5 mA, -35°C ≤ TA ≤ +85°C | 3 |+| SCR Trigger Detector On | | 1.3 | 2.8 | | V | Pin 5 to Pin 4; IS = 1.5 mA, -35°C ≤ TA ≤ +85°C | 3 |+| SCR Trigger Detector Off | | 0 | 3 | 50 | mV | IS = 1.5 mA, -35°C ≤ TA ≤ +85°C | 3 |+| Supply Current | VCC | | | 18 | mA | | 2 |+| Internal Power Dissipation | PD | | | 500 | mW | | 2 |+| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 2 |+| Operating Temperature Range | TA | -35 | | 85 | °C | | 2 |+| Junction Temperature | TJ | | | 125 | °C | | 2 |+| Lead Soldering Temperature | TL | | | 260 | °C | 10 s, SOIC | 2 |+| Power Dissipation SOIC | PD | | | 300 | mW | TA <50°C, SOIC | 2 |+| Power Dissipation Derating SOIC | | | 4 | | mW/°C | TA <50°C Derate, SOIC | 2 |+| Thermal Resistance SOIC | θJA | | 240 | | °C/W | SOIC | 2 |+| Resistor R1 | R1 | | 10 | | kΩ | Pin 1 to Pin 3; IS = 0 mA | 3 |+| Resistor R2 | R2 | | 10 | | kΩ | Pin 2 to Pin 3; IS = 0 mA | 3 |+| +Output Source Current | | | 650 | | µA | Pin 7 to Pin 3; IS = 1.5 mA, TA = +25°C | 3 |+| -Output Source Current | | | 1 | | mA | Pin 7 to Pin 3; IS = 1.5 mA, TA = +25°C | 3 |+| Quiescent Current | Is | | 500 | | µA | +VS = 24 V; IS = 1.5 mA, -35°C ≤ TA ≤ +85°C | 3 |+| Gain Bandwidth Product | | | 1.8 | | MHz | f = 50 kHz; IS = 1.5 mA, -35°C ≤ TA ≤ +85°C | 3 |++## CAD (KiCad official)++- Symbol: `RV4145AMT`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `rv4145amt-etched.step` / `rv4145amt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rv4145amt.step` / `rv4145amt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/rv4145amt-d.pdf) (10 pp, sha256 `5e7e12baa46aa4f0`, retrieved 2026-10-22, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/rv4145amt-datasheet.pdf)
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