component
RT9048GSP
Public Made by Adomby adom
Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -37,6 +37,20 @@ RT9048GSP from Richtek Tech, in a SOIC-8. Pinout and pin descriptions extracted - Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm` - 3D model: SOIC-8 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`rt9048gsp.step`](rt9048gsp.step) | 122 KB | You want the bare part, or you mark your own boards. |+| [`rt9048gsp-etched.step`](rt9048gsp-etched.step) | 2.3 MB | You want the part with `RT9048GSP` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 552 faces against 147 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "rt9048gsp",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+10−10@@ -4,7 +4,7 @@ "slug": "rt9048gsp", "title": "RT9048GSP", "brief": "Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -40,13 +40,13 @@ "number": "2", "name": "EN", "type": "input",- "description": "Enable control input (Active-High). Pulling below 0.4V turns the regulator off, reducing quiescent current to ~1.5\u03bcA. Enable threshold typ. 1.08V rising / 1.02V falling at VIN=3.3V. Device is enabled if left open; connect to VIN if not used."+ "description": "Enable control input (Active-High). Pulling below 0.4V turns the regulator off, reducing quiescent current to ~1.5μA. Enable threshold typ. 1.08V rising / 1.02V falling at VIN=3.3V. Device is enabled if left open; connect to VIN if not used." }, { "number": "3", "name": "VIN", "type": "power_in",- "description": "Supply voltage input. For full-load regulation, input must be between (VOUT + 0.5V) and 6V. Minimum input voltage is 1.4V. Place a large bulk cap plus at least a 10\u03bcF ceramic capacitor directly at this pin."+ "description": "Supply voltage input. For full-load regulation, input must be between (VOUT + 0.5V) and 6V. Minimum input voltage is 1.4V. Place a large bulk cap plus at least a 10μF ceramic capacitor directly at this pin." }, { "number": "4",@@ -64,13 +64,13 @@ "number": "6", "name": "VOUT", "type": "power_out",- "description": "Regulated output voltage, adjustable from 0.5V up to VIN \u2212 VDROP, sourcing up to 2A. Place a minimum 10\u03bcF ceramic capacitor directly at this pin for stability."+ "description": "Regulated output voltage, adjustable from 0.5V up to VIN − VDROP, sourcing up to 2A. Place a minimum 10μF ceramic capacitor directly at this pin for stability." }, { "number": "7", "name": "ADJ", "type": "input",- "description": "Feedback voltage input, VADJ = 0.5V (typ). If tied to VOUT, output is set to 0.5V. Otherwise VOUT = 0.5V \u00d7 (1 + R1/R2) via an external resistor divider. Very low IADJ (~20nA) permits divider resistors up to 800k\u03a9."+ "description": "Feedback voltage input, VADJ = 0.5V (typ). If tied to VOUT, output is set to 0.5V. Otherwise VOUT = 0.5V × (1 + R1/R2) via an external resistor divider. Very low IADJ (~20nA) permits divider resistors up to 800kΩ." }, { "number": "8",@@ -82,7 +82,7 @@ "number": "9", "name": "GND", "type": "power_in",- "description": "Exposed thermal pad (bottom of package). Must be soldered to a large PCB ground plane and connected to GND for maximum power dissipation (\u03b8JA = 49\u00b0C/W on a 4-layer JEDEC board)."+ "description": "Exposed thermal pad (bottom of package). Must be soldered to a large PCB ground plane and connected to GND for maximum power dissipation (θJA = 49°C/W on a 4-layer JEDEC board)." } ], "provenance": {@@ -156,9 +156,9 @@ "docs/hero.png", "docs/rt9048gsp-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D." }