component
RT8296AHZSP
Public Made by Adomby adom
Richtek Tech DC-DC Converters, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -40,6 +40,20 @@ RT8296AHZSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extrac - Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm` - 3D model: SOP-8-EP (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`rt8296ahzsp.step`](rt8296ahzsp.step) | 125 KB | You want the bare part, or you mark your own boards. |+| [`rt8296ahzsp-etched.step`](rt8296ahzsp-etched.step) | 2.5 MB | You want the part with `RT8296AHZSP` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 598 faces against 152 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "rt8296ahzsp",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "Richtek Tech DC-DC Converters, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+14−11@@ -4,7 +4,7 @@ "slug": "rt8296ahzsp", "title": "RT8296AHZSP", "brief": "Richtek Tech DC-DC Converters, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -34,49 +34,49 @@ "number": "1", "name": "BOOT", "type": "passive",- "description": "Bootstrap for high-side gate driver. Connect a 0.1\u03bcF or greater ceramic capacitor from BOOT to SW to provide the boosted gate-drive voltage for the internal high-side N-MOSFET. Absolute max 31.3V; VBOOT \u2212 VSW max 6V."+ "description": "Bootstrap for high-side gate driver. Connect a 0.1μF or greater ceramic capacitor from BOOT to SW to provide the boosted gate-drive voltage for the internal high-side N-MOSFET. Absolute max 31.3V; VBOOT − VSW max 6V." }, { "number": "2", "name": "VIN", "type": "power_in",- "description": "Input supply voltage, 4.5V to 23V operating range (absolute max 25V). Must be bypassed with a suitably large ceramic capacitor (e.g. 10\u03bcF x 2) placed close to the pin."+ "description": "Input supply voltage, 4.5V to 23V operating range (absolute max 25V). Must be bypassed with a suitably large ceramic capacitor (e.g. 10μF x 2) placed close to the pin." }, { "number": "3", "name": "SW", "type": "power_out",- "description": "Switch (phase) node. Connect to the external L-C output filter. This is the drain node of the internal high-side and source of the internal low-side N-MOSFETs (RDS(ON) \u2248 85m\u03a9 each), swinging between GND and VIN at 340kHz."+ "description": "Switch (phase) node. Connect to the external L-C output filter. This is the drain node of the internal high-side and source of the internal low-side N-MOSFETs (RDS(ON) ≈ 85mΩ each), swinging between GND and VIN at 340kHz." }, { "number": "4", "name": "GND", "type": "power_in",- "description": "Ground return. Pin 4 and the exposed pad (pin 9) must both be tied to ground; solder the exposed pad to a large PCB copper area for maximum power dissipation (\u03b8JA = 75\u00b0C/W, \u03b8JC = 15\u00b0C/W)."+ "description": "Ground return. Pin 4 and the exposed pad (pin 9) must both be tied to ground; solder the exposed pad to a large PCB copper area for maximum power dissipation (θJA = 75°C/W, θJC = 15°C/W)." }, { "number": "5", "name": "FB", "type": "input",- "description": "Feedback input. Regulates to an internal 0.8V (\u00b11.5%) reference. For adjustable output, connect an external resistive divider from VOUT to FB to GND to set the output voltage from 0.8V to 20V."+ "description": "Feedback input. Regulates to an internal 0.8V (±1.5%) reference. For adjustable output, connect an external resistive divider from VOUT to FB to GND to set the output voltage from 0.8V to 20V." }, { "number": "6", "name": "COMP", "type": "output",- "description": "Error-amplifier compensation node (GEA \u2248 940\u03bcA/V). Connect a series RC network from COMP to GND to compensate the current-mode control loop; an optional capacitor from COMP to GND may be added for a high-frequency pole."+ "description": "Error-amplifier compensation node (GEA ≈ 940μA/V). Connect a series RC network from COMP to GND to compensate the current-mode control loop; an optional capacitor from COMP to GND may be added for a high-frequency pole." }, { "number": "7", "name": "EN", "type": "input",- "description": "Enable input. Logic-high (VIH \u2265 2.7V) enables the converter; logic-low (VIL \u2264 0.4V) forces shutdown, reducing supply current to <3\u03bcA. Tie to VIN through a 100k\u03a9 pull-up for automatic startup. Absolute max 6V."+ "description": "Enable input. Logic-high (VIH ≥ 2.7V) enables the converter; logic-low (VIL ≤ 0.4V) forces shutdown, reducing supply current to <3μA. Tie to VIN through a 100kΩ pull-up for automatic startup. Absolute max 6V." }, { "number": "8", "name": "SS", "type": "passive",- "description": "Soft-start control input. Connect a capacitor from SS to GND to program the soft-start ramp period; ISS \u2248 6\u03bcA charging current. A 0.1\u03bcF capacitor sets tSS \u2248 13.5ms."+ "description": "Soft-start control input. Connect a capacitor from SS to GND to program the soft-start ramp period; ISS ≈ 6μA charging current. A 0.1μF capacitor sets tSS ≈ 13.5ms." }, { "number": "9",@@ -156,6 +156,9 @@ "docs/hero.png", "docs/rt8296ahzsp-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"- ]+ "viewers/footprint.html",+ "pads.json"+ ],+ "description": "Richtek Tech DC-DC Converters, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "visibility": "public" }