component
RT7272BGSP
Public Made by Adomby adom
Richtek Tech DC-DC Converters, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+48@@ -0,0 +1,48 @@+# RT7272BGSP++**Richtek Tech** · DC-DC Converters · SOIC-8-EP++RT7272BGSP from Richtek Tech, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SW | output | Switch Node. Internal high-side/low-side N-MOSFET common drain node. Connect to the external L-C output filter. Absolute maximum -0.3V to (VIN + 0.3V). |+| 2 | BOOT | power_in | Bootstrap Supply for the High-Side Gate Driver. Connect a 100nF or greater ceramic capacitor from BOOT to SW. VBOOT - VSW absolute maximum is -0.3V to 6V. |+| 3 | EN | input | Enable Control Input. Logic-high (VIH ≥ 2V) enables the converter; logic-low (VIL ≤ 0.4V) forces the device into shutdown mode (IQ ≈ 0.5µA). Do not float. |+| 4 | GND | power_in | Ground. Signal and power ground return. Connect together with the exposed pad (pin 9) to a large PCB copper area for maximum thermal dissipation. |+| 5 | FB | input | Feedback Input. Connect to the converter output through a resistive divider to program the output voltage. Internal reference VREF = 0.8V (typ). |+| 6 | COMP | output | Compensation Node. Error amplifier output used to compensate the control loop. Connect a series R-C network from COMP to GND; an additional shunt capacitor to GND may be required in some designs. |+| 7 | RLIM | input | Current Limit Setting. Connect a resistor from RLIM to GND to program the high-side MOSFET peak current limit (adjustable from 1.9A to 7A per RLIM equation in Note 5). |+| 8 | VIN | power_in | Power Input. Supplies the internal regulator and the high-side MOSFET drain. Operating range 4.5V to 36V (absolute max 40V). Bypass with a suitable large ceramic capacitor placed close to the pin. |+| 9 | GND (Exposed Pad) | power_in | Exposed thermal pad. Must be soldered to a large PCB copper area connected to GND for maximum thermal dissipation. Electrically connected to pin 4 (GND). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Richtek Tech |+| Package | SOIC-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `RT7272BGSPGSP`++## CAD (KiCad official)++- Symbol: `RT7272BGSP`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Richtek Tech datasheet](docs/rt7272bgsp-datasheet.pdf) (15 pp, sha256 `cdf11346d1fc1345`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/rt7272bgsp-datasheet.pdf)
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