← Commit history

Initial commit: component/pt2005a

Ray ·0139fb2457 ·28d ago
2 files changed +86
README.mdadded+52
@@ -0,0 +1,52 @@+# PT2005A++**PUOLOP** · Synchronous Rectifier Controllers · SOIC-8++PT2005A from PUOLOP, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Ground; connected to the source of the internal N-channel power MOSFET. Ties 1/2/3 are shorted internally to the MOSFET source and serve as the ground reference for all internal circuitry. |+| 2 | GND | power_in | Ground; connected to the source of the internal N-channel power MOSFET. Parallel with pins 1 and 3 for current handling and thermal dissipation. |+| 3 | GND | power_in | Ground; connected to the source of the internal N-channel power MOSFET. Parallel with pins 1 and 2. |+| 4 | VCC | power_in | Supply pin. VCC_ON start-up threshold ~3.9V, VCC_UVLO ~3.6V, VCC_OVP clamp 7.5-8.5V (typ 8.0V). Powered by internal self-supply circuit via SW/GND during flyback operation; typically decoupled with 0.1µF. |+| 5 | SW | power_out | Drain of the internal N-channel power MOSFET (synchronous rectifier switch node). Absolute max SW voltage -0.7V to +40V; V(BR)DSS min 40V (typ 45V). Also used by the on-chip Vds sensing (VTHON/VTHOFF) and the internal self-supply charge path. |+| 6 | SW | power_out | Drain of the internal N-channel power MOSFET. Parallel with pins 5, 7, 8 for current handling and thermal dissipation. |+| 7 | SW | power_out | Drain of the internal N-channel power MOSFET. Parallel with pins 5, 6, 8. |+| 8 | SW | power_out | Drain of the internal N-channel power MOSFET. Parallel with pins 5, 6, 7. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | PUOLOP |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## Ordering variants++Same part, different packaging or reel option.++- `PT2005AA`+- `PT2005AB`+- `PT2005AC`++## CAD (KiCad official)++- Symbol: `PT2005A`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [PUOLOP datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588904526811815936) (5 pp, sha256 `77dce7917d967fff`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/pt2005a-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "pt2005a",+  "version": "0.1.0",+  "type": "component",+  "description": "PUOLOP Synchronous Rectifier Controllers, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "pt2005a"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "pt2005a.kicad_sym",+    "pt2005a.kicad_mod",+    "pt2005a.glb",+    "pt2005a.step",+    "pt2005a.lbr",+    "docs/hero.png",+    "docs/pt2005a-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file