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pic18f45k20-i: factory component page (tier=lcsc)

Ray ·80f6031a40 ·25d ago ·parent 5ce3fad
1 file changed +326−8
page.json+326−8
@@ -1,13 +1,336 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "pic18f45k20-i",+  "title": "PIC18F45K20-I",+  "brief": "Microchip Tech Microcontrollers (MCU/MPU/SOC), TQFP-44(10x10). Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Microchip Tech Microcontrollers (MCU/MPU/SOC), TQFP-44(10x10). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "embedded processors & controllers",     "pic18f45k20-i"   ],+  "component": {+    "mpn": "PIC18F45K20-I",+    "manufacturer": "Microchip Tech",+    "package": "TQFP-44(10x10)",+    "pin_count": 40,+    "category": "Embedded Processors & Controllers",+    "subcategory": "Microcontrollers (MCU/MPU/SOC)",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586182450855235584",+    "parts": {+      "symbol": "pic18f45k20-i.kicad_sym",+      "footprint": "pic18f45k20-i.kicad_mod",+      "model_3d": "pic18f45k20-i.glb",+      "model_3d_step": "pic18f45k20-i.step",+      "lbr": "pic18f45k20-i.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "MCLR/VPP/RE3",+        "type": "input",+        "description": "Active-low Master Clear (device Reset) input, high-voltage programming voltage (VPP) input, or PORTE bit 3 digital input. Schmitt-Trigger buffer. When MCLR function is disabled via config, pin operates as read-only RE3 input."+      },+      {+        "number": "2",+        "name": "RA0/AN0/C12IN0-",+        "type": "bidirectional",+        "description": "PORTA bit 0 digital I/O (TTL input), ADC analog channel 0 (AN0), or Comparator C1/C2 inverting input 0 (C12IN0-). Function selected by peripheral configuration registers."+      },+      {+        "number": "3",+        "name": "RA1/AN1/C12IN1-",+        "type": "bidirectional",+        "description": "PORTA bit 1 digital I/O (TTL input), ADC analog channel 1 (AN1), or Comparator C1/C2 inverting input 1 (C12IN1-)."+      },+      {+        "number": "4",+        "name": "RA2/AN2/VREF-/CVREF/C2IN+",+        "type": "bidirectional",+        "description": "PORTA bit 2 digital I/O, ADC channel 2 (AN2), ADC low-voltage reference input (VREF-), programmable Comparator Voltage Reference output (CVREF), or Comparator C2 non-inverting input."+      },+      {+        "number": "5",+        "name": "RA3/AN3/VREF+/C1IN+",+        "type": "bidirectional",+        "description": "PORTA bit 3 digital I/O, ADC channel 3 (AN3), ADC high-voltage reference input (VREF+), or Comparator C1 non-inverting input."+      },+      {+        "number": "6",+        "name": "RA4/T0CKI/C1OUT",+        "type": "bidirectional",+        "description": "PORTA bit 4 digital I/O (Schmitt-Trigger input), Timer0 external clock input (T0CKI), or Comparator C1 output (CMOS)."+      },+      {+        "number": "7",+        "name": "RA5/AN4/SS/HLVDIN/C2OUT",+        "type": "bidirectional",+        "description": "PORTA bit 5 digital I/O, ADC channel 4 (AN4), SPI slave select input (SS), High/Low-Voltage Detect analog input (HLVDIN), or Comparator C2 output."+      },+      {+        "number": "8",+        "name": "RE0/RD/AN5",+        "type": "bidirectional",+        "description": "PORTE bit 0 digital I/O, Parallel Slave Port active-low Read control input (RD), or ADC channel 5 (AN5). See related WR and CS pins for PSP interface."+      },+      {+        "number": "9",+        "name": "RE1/WR/AN6",+        "type": "bidirectional",+        "description": "PORTE bit 1 digital I/O, Parallel Slave Port active-low Write control input (WR), or ADC channel 6 (AN6)."+      },+      {+        "number": "10",+        "name": "RE2/CS/AN7",+        "type": "bidirectional",+        "description": "PORTE bit 2 digital I/O, Parallel Slave Port active-low Chip Select input (CS), or ADC channel 7 (AN7)."+      },+      {+        "number": "11",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply rail for logic and I/O pins. Operating range 1.8V to 3.6V; maximum frequency 64 MHz across industrial temperature range."+      },+      {+        "number": "12",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground reference for logic and I/O pins."+      },+      {+        "number": "13",+        "name": "OSC1/CLKIN/RA7",+        "type": "bidirectional",+        "description": "Primary oscillator crystal input (OSC1), external clock source input (CLKIN), or PORTA bit 7 general-purpose digital I/O. Schmitt-Trigger buffer in RC mode, analog otherwise."+      },+      {+        "number": "14",+        "name": "OSC2/CLKOUT/RA6",+        "type": "bidirectional",+        "description": "Primary oscillator crystal output (OSC2) connects to crystal/resonator in Crystal modes; in RC mode outputs CLKOUT (Fosc/4 instruction cycle rate); or PORTA bit 6 digital I/O in INTOSC modes."+      },+      {+        "number": "15",+        "name": "RC0/T1OSO/T13CKI",+        "type": "bidirectional",+        "description": "PORTC bit 0 digital I/O (Schmitt-Trigger input), Timer1 secondary oscillator output (T1OSO), or Timer1/Timer3 external clock input (T13CKI)."+      },+      {+        "number": "16",+        "name": "RC1/T1OSI/CCP2",+        "type": "bidirectional",+        "description": "PORTC bit 1 digital I/O, Timer1 secondary oscillator input (T1OSI, CMOS buffer), or Capture2/Compare2/PWM2 (CCP2). CCP2 is on RC1 when CONFIG bit CCP2MX=1 (default)."+      },+      {+        "number": "17",+        "name": "RC2/CCP1/P1A",+        "type": "bidirectional",+        "description": "PORTC bit 2 digital I/O, Capture1/Compare1/PWM1 (CCP1), or Enhanced CCP1 output P1A."+      },+      {+        "number": "18",+        "name": "RC3/SCK/SCL",+        "type": "bidirectional",+        "description": "PORTC bit 3 digital I/O, MSSP synchronous serial clock for SPI mode (SCK), or synchronous serial clock for I2C mode (SCL). Schmitt-Trigger inputs."+      },+      {+        "number": "19",+        "name": "RD0/PSP0",+        "type": "bidirectional",+        "description": "PORTD bit 0 digital I/O, or Parallel Slave Port data bit 0 (PSP0, TTL buffer when PSP enabled)."+      },+      {+        "number": "20",+        "name": "RD1/PSP1",+        "type": "bidirectional",+        "description": "PORTD bit 1 digital I/O, or Parallel Slave Port data bit 1 (PSP1)."+      },+      {+        "number": "21",+        "name": "RD2/PSP2",+        "type": "bidirectional",+        "description": "PORTD bit 2 digital I/O, or Parallel Slave Port data bit 2 (PSP2)."+      },+      {+        "number": "22",+        "name": "RD3/PSP3",+        "type": "bidirectional",+        "description": "PORTD bit 3 digital I/O, or Parallel Slave Port data bit 3 (PSP3)."+      },+      {+        "number": "23",+        "name": "RC4/SDI/SDA",+        "type": "bidirectional",+        "description": "PORTC bit 4 digital I/O, MSSP SPI data in (SDI), or I2C data I/O (SDA). Schmitt-Trigger inputs."+      },+      {+        "number": "24",+        "name": "RC5/SDO",+        "type": "bidirectional",+        "description": "PORTC bit 5 digital I/O, or MSSP SPI data out (SDO)."+      },+      {+        "number": "25",+        "name": "RC6/TX/CK",+        "type": "bidirectional",+        "description": "PORTC bit 6 digital I/O, EUSART asynchronous transmit (TX), or EUSART synchronous clock (CK)."+      },+      {+        "number": "26",+        "name": "RC7/RX/DT",+        "type": "bidirectional",+        "description": "PORTC bit 7 digital I/O, EUSART asynchronous receive (RX), or EUSART synchronous data (DT)."+      },+      {+        "number": "27",+        "name": "RD4/PSP4",+        "type": "bidirectional",+        "description": "PORTD bit 4 digital I/O, or Parallel Slave Port data bit 4 (PSP4)."+      },+      {+        "number": "28",+        "name": "RD5/PSP5/P1B",+        "type": "bidirectional",+        "description": "PORTD bit 5 digital I/O, Parallel Slave Port data bit 5 (PSP5), or Enhanced CCP1 output P1B (half/full-bridge PWM)."+      },+      {+        "number": "29",+        "name": "RD6/PSP6/P1C",+        "type": "bidirectional",+        "description": "PORTD bit 6 digital I/O, Parallel Slave Port data bit 6 (PSP6), or Enhanced CCP1 output P1C."+      },+      {+        "number": "30",+        "name": "RD7/PSP7/P1D",+        "type": "bidirectional",+        "description": "PORTD bit 7 digital I/O, Parallel Slave Port data bit 7 (PSP7), or Enhanced CCP1 output P1D."+      },+      {+        "number": "31",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground reference for logic and I/O pins (second VSS pin on 40-PIN PDIP)."+      },+      {+        "number": "32",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply rail (second VDD pin on 40-PIN PDIP). Bypass with 0.1 uF ceramic to nearest VSS."+      },+      {+        "number": "33",+        "name": "RB0/INT0/FLT0/AN12",+        "type": "bidirectional",+        "description": "PORTB bit 0 digital I/O (TTL input, programmable weak pull-up), external interrupt 0 (INT0, Schmitt-Trigger), PWM Fault input for Enhanced CCP1 (FLT0), or ADC channel 12 (AN12)."+      },+      {+        "number": "34",+        "name": "RB1/INT1/AN10/C12IN3-",+        "type": "bidirectional",+        "description": "PORTB bit 1 digital I/O (weak pull-up), external interrupt 1 (INT1), ADC channel 10 (AN10), or Comparator C1/C2 inverting input 3 (C12IN3-)."+      },+      {+        "number": "35",+        "name": "RB2/INT2/AN8",+        "type": "bidirectional",+        "description": "PORTB bit 2 digital I/O (weak pull-up), external interrupt 2 (INT2), or ADC channel 8 (AN8)."+      },+      {+        "number": "36",+        "name": "RB3/AN9/C12IN2-/CCP2",+        "type": "bidirectional",+        "description": "PORTB bit 3 digital I/O (weak pull-up), ADC channel 9 (AN9), Comparator C1/C2 inverting input 2 (C12IN2-), or alternate CCP2 (Capture2/Compare2/PWM2) when CONFIG bit CCP2MX=0."+      },+      {+        "number": "37",+        "name": "RB4/KBI0/AN11",+        "type": "bidirectional",+        "description": "PORTB bit 4 digital I/O (weak pull-up), interrupt-on-change pin (KBI0), or ADC channel 11 (AN11)."+      },+      {+        "number": "38",+        "name": "RB5/KBI1/PGM",+        "type": "bidirectional",+        "description": "PORTB bit 5 digital I/O (weak pull-up), interrupt-on-change (KBI1), or Low-Voltage ICSP programming enable pin (PGM)."+      },+      {+        "number": "39",+        "name": "RB6/KBI2/PGC",+        "type": "bidirectional",+        "description": "PORTB bit 6 digital I/O (weak pull-up), interrupt-on-change (KBI2), or In-Circuit Debugger/ICSP programming clock pin (PGC)."+      },+      {+        "number": "40",+        "name": "RB7/KBI3/PGD",+        "type": "bidirectional",+        "description": "PORTB bit 7 digital I/O (weak pull-up), interrupt-on-change (KBI3), or In-Circuit Debugger/ICSP programming data pin (PGD)."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586182450855235584",+        "pages": 441,+        "sha256": "add2e70b6d968ecb",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 40,+        "described": 40,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Microchip Tech",+      "Package": "TQFP-44(10x10)",+      "Category": "Embedded Processors & Controllers",+      "Pins": "40"+    }+  },+  "variants": [+    {+      "mpn": "PIC18F45K20-II/P",+      "kind": "packaging"+    },+    {+      "mpn": "PIC18F45K20-II/PT",+      "kind": "packaging"+    },+    {+      "mpn": "PIC18F45K20-II/ML",+      "kind": "packaging"+    },+    {+      "mpn": "PIC18F45K20-II/MV",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "pic18f45k20-i"+  ],+  "discovery_pitch": "PIC18F45K20-I (Microchip Tech) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +348,5 @@     "docs/pic18f45k20-i-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file