PIC18F45K20-I

@@ -0,0 +1,84 @@+# PIC18F45K20-I++**Microchip Tech** · Microcontrollers (MCU/MPU/SOC) · TQFP-44(10x10)++PIC18F45K20-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | MCLR/VPP/RE3 | input | Active-low Master Clear (device Reset) input, high-voltage programming voltage (VPP) input, or PORTE bit 3 digital input. Schmitt-Trigger buffer. When MCLR function is disabled via config, pin operates as read-only RE3 input. |+| 2 | RA0/AN0/C12IN0- | bidirectional | PORTA bit 0 digital I/O (TTL input), ADC analog channel 0 (AN0), or Comparator C1/C2 inverting input 0 (C12IN0-). Function selected by peripheral configuration registers. |+| 3 | RA1/AN1/C12IN1- | bidirectional | PORTA bit 1 digital I/O (TTL input), ADC analog channel 1 (AN1), or Comparator C1/C2 inverting input 1 (C12IN1-). |+| 4 | RA2/AN2/VREF-/CVREF/C2IN+ | bidirectional | PORTA bit 2 digital I/O, ADC channel 2 (AN2), ADC low-voltage reference input (VREF-), programmable Comparator Voltage Reference output (CVREF), or Comparator C2 non-inverting input. |+| 5 | RA3/AN3/VREF+/C1IN+ | bidirectional | PORTA bit 3 digital I/O, ADC channel 3 (AN3), ADC high-voltage reference input (VREF+), or Comparator C1 non-inverting input. |+| 6 | RA4/T0CKI/C1OUT | bidirectional | PORTA bit 4 digital I/O (Schmitt-Trigger input), Timer0 external clock input (T0CKI), or Comparator C1 output (CMOS). |+| 7 | RA5/AN4/SS/HLVDIN/C2OUT | bidirectional | PORTA bit 5 digital I/O, ADC channel 4 (AN4), SPI slave select input (SS), High/Low-Voltage Detect analog input (HLVDIN), or Comparator C2 output. |+| 8 | RE0/RD/AN5 | bidirectional | PORTE bit 0 digital I/O, Parallel Slave Port active-low Read control input (RD), or ADC channel 5 (AN5). See related WR and CS pins for PSP interface. |+| 9 | RE1/WR/AN6 | bidirectional | PORTE bit 1 digital I/O, Parallel Slave Port active-low Write control input (WR), or ADC channel 6 (AN6). |+| 10 | RE2/CS/AN7 | bidirectional | PORTE bit 2 digital I/O, Parallel Slave Port active-low Chip Select input (CS), or ADC channel 7 (AN7). |+| 11 | VDD | power_in | Positive supply rail for logic and I/O pins. Operating range 1.8V to 3.6V; maximum frequency 64 MHz across industrial temperature range. |+| 12 | VSS | power_in | Ground reference for logic and I/O pins. |+| 13 | OSC1/CLKIN/RA7 | bidirectional | Primary oscillator crystal input (OSC1), external clock source input (CLKIN), or PORTA bit 7 general-purpose digital I/O. Schmitt-Trigger buffer in RC mode, analog otherwise. |+| 14 | OSC2/CLKOUT/RA6 | bidirectional | Primary oscillator crystal output (OSC2) connects to crystal/resonator in Crystal modes; in RC mode outputs CLKOUT (Fosc/4 instruction cycle rate); or PORTA bit 6 digital I/O in INTOSC modes. |+| 15 | RC0/T1OSO/T13CKI | bidirectional | PORTC bit 0 digital I/O (Schmitt-Trigger input), Timer1 secondary oscillator output (T1OSO), or Timer1/Timer3 external clock input (T13CKI). |+| 16 | RC1/T1OSI/CCP2 | bidirectional | PORTC bit 1 digital I/O, Timer1 secondary oscillator input (T1OSI, CMOS buffer), or Capture2/Compare2/PWM2 (CCP2). CCP2 is on RC1 when CONFIG bit CCP2MX=1 (default). |+| 17 | RC2/CCP1/P1A | bidirectional | PORTC bit 2 digital I/O, Capture1/Compare1/PWM1 (CCP1), or Enhanced CCP1 output P1A. |+| 18 | RC3/SCK/SCL | bidirectional | PORTC bit 3 digital I/O, MSSP synchronous serial clock for SPI mode (SCK), or synchronous serial clock for I2C mode (SCL). Schmitt-Trigger inputs. |+| 19 | RD0/PSP0 | bidirectional | PORTD bit 0 digital I/O, or Parallel Slave Port data bit 0 (PSP0, TTL buffer when PSP enabled). |+| 20 | RD1/PSP1 | bidirectional | PORTD bit 1 digital I/O, or Parallel Slave Port data bit 1 (PSP1). |+| 21 | RD2/PSP2 | bidirectional | PORTD bit 2 digital I/O, or Parallel Slave Port data bit 2 (PSP2). |+| 22 | RD3/PSP3 | bidirectional | PORTD bit 3 digital I/O, or Parallel Slave Port data bit 3 (PSP3). |+| 23 | RC4/SDI/SDA | bidirectional | PORTC bit 4 digital I/O, MSSP SPI data in (SDI), or I2C data I/O (SDA). Schmitt-Trigger inputs. |+| 24 | RC5/SDO | bidirectional | PORTC bit 5 digital I/O, or MSSP SPI data out (SDO). |+| 25 | RC6/TX/CK | bidirectional | PORTC bit 6 digital I/O, EUSART asynchronous transmit (TX), or EUSART synchronous clock (CK). |+| 26 | RC7/RX/DT | bidirectional | PORTC bit 7 digital I/O, EUSART asynchronous receive (RX), or EUSART synchronous data (DT). |+| 27 | RD4/PSP4 | bidirectional | PORTD bit 4 digital I/O, or Parallel Slave Port data bit 4 (PSP4). |+| 28 | RD5/PSP5/P1B | bidirectional | PORTD bit 5 digital I/O, Parallel Slave Port data bit 5 (PSP5), or Enhanced CCP1 output P1B (half/full-bridge PWM). |+| 29 | RD6/PSP6/P1C | bidirectional | PORTD bit 6 digital I/O, Parallel Slave Port data bit 6 (PSP6), or Enhanced CCP1 output P1C. |+| 30 | RD7/PSP7/P1D | bidirectional | PORTD bit 7 digital I/O, Parallel Slave Port data bit 7 (PSP7), or Enhanced CCP1 output P1D. |+| 31 | VSS | power_in | Ground reference for logic and I/O pins (second VSS pin on 40-PIN PDIP). |+| 32 | VDD | power_in | Positive supply rail (second VDD pin on 40-PIN PDIP). Bypass with 0.1 uF ceramic to nearest VSS. |+| 33 | RB0/INT0/FLT0/AN12 | bidirectional | PORTB bit 0 digital I/O (TTL input, programmable weak pull-up), external interrupt 0 (INT0, Schmitt-Trigger), PWM Fault input for Enhanced CCP1 (FLT0), or ADC channel 12 (AN12). |+| 34 | RB1/INT1/AN10/C12IN3- | bidirectional | PORTB bit 1 digital I/O (weak pull-up), external interrupt 1 (INT1), ADC channel 10 (AN10), or Comparator C1/C2 inverting input 3 (C12IN3-). |+| 35 | RB2/INT2/AN8 | bidirectional | PORTB bit 2 digital I/O (weak pull-up), external interrupt 2 (INT2), or ADC channel 8 (AN8). |+| 36 | RB3/AN9/C12IN2-/CCP2 | bidirectional | PORTB bit 3 digital I/O (weak pull-up), ADC channel 9 (AN9), Comparator C1/C2 inverting input 2 (C12IN2-), or alternate CCP2 (Capture2/Compare2/PWM2) when CONFIG bit CCP2MX=0. |+| 37 | RB4/KBI0/AN11 | bidirectional | PORTB bit 4 digital I/O (weak pull-up), interrupt-on-change pin (KBI0), or ADC channel 11 (AN11). |+| 38 | RB5/KBI1/PGM | bidirectional | PORTB bit 5 digital I/O (weak pull-up), interrupt-on-change (KBI1), or Low-Voltage ICSP programming enable pin (PGM). |+| 39 | RB6/KBI2/PGC | bidirectional | PORTB bit 6 digital I/O (weak pull-up), interrupt-on-change (KBI2), or In-Circuit Debugger/ICSP programming clock pin (PGC). |+| 40 | RB7/KBI3/PGD | bidirectional | PORTB bit 7 digital I/O (weak pull-up), interrupt-on-change (KBI3), or In-Circuit Debugger/ICSP programming data pin (PGD). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Microchip Tech |+| Package | TQFP-44(10x10) |+| Category | Embedded Processors & Controllers |+| Pins | 40 |++## Ordering variants++Same part, different packaging or reel option.++- `PIC18F45K20-II/P`+- `PIC18F45K20-II/PT`+- `PIC18F45K20-II/ML`+- `PIC18F45K20-II/MV`++## CAD (KiCad official)++- Symbol: `PIC18F45K20-I`+- Footprint: `Package_QFP:TQFP-44_10x10mm_P0.8mm`+- 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586182450855235584) (441 pp, sha256 `add2e70b6d968ecb`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/pic18f45k20-i-datasheet.pdf)