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PGA870IRHDR
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Texas Instruments Differential Amplifiers, VQFN-28-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+65@@ -0,0 +1,65 @@+# PGA870IRHDR++**Texas Instruments** · Differential Amplifiers · VQFN-28-EP(5x5)++PGA870IRHDR from Texas Instruments, in a VQFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | LATCH MODE | input | Controls latched and unlatched acquisition of the gain control word (B0 to B5); digital thresholds are 0.9 V low and 2.1 V high. |+| 2 | VS+ | power_in | +5 V power supply; specified operating voltage 4.75 V to 5.25 V. |+| 3 | IN+ | input | Noninverting input; differential input resistance 150 Ω typical. |+| 4 | VMID2 | passive | Buffer output for the internal midsupply reference, not intended to drive an external load, and should be bypassed by a 0.1-μF capacitor. |+| 5 | IN- | input | Inverting input; differential input resistance 150 Ω typical. |+| 6 | VS+ | power_in | +5 V power supply; specified operating voltage 4.75 V to 5.25 V. |+| 7 | GAIN STROBE | input | Gain latch clock pin; data set-up time to GAIN STROBE low is 2.5 ns typical and hold time is 0 ns. |+| 8 | B5 (MSB) | input | Gain control MSB of the 6-bit gain word. |+| 9 | B4 | input | Gain control bit 4. |+| 10 | B3 | input | Gain control bit 3. |+| 11 | VS+ | power_in | +5 V power supply; specified operating voltage 4.75 V to 5.25 V. |+| 12 | B2 | input | Gain control bit 2. |+| 13 | B1 | input | Gain control bit 1. |+| 14 | B0 (LSB) | input | Gain control bit 0 (LSB). |+| 15 | GND | power_in | Ground. |+| 16 | VS+ | power_in | +5 V power supply; specified operating voltage 4.75 V to 5.25 V. |+| 17 | OUT- | output | Inverting output. |+| 18 | GND | power_in | Ground. |+| 19 | OUT+ | output | Noninverting output. |+| 20 | VS+ | power_in | +5 V power supply; specified operating voltage 4.75 V to 5.25 V. |+| 21 | GND | power_in | Ground. |+| 22 | GND | power_in | Ground. |+| 23 | GND | power_in | Ground. |+| 24 | GND | power_in | Ground. |+| 25 | VS+ | power_in | +5 V power supply; specified operating voltage 4.75 V to 5.25 V. |+| 26 | GND | power_in | Ground. |+| 27 | PD | input | Active-low power-down for the analog circuitry (on above 2.1 V, off below 0.9 V); gain control CMOS circuitry stays active when PD is low. |+| 28 | VMID1 | passive | Chip bypass pin for the internal midsupply reference, not intended as an input, and should be bypassed with a 0.1-μF capacitor. |+| 29 | PowerPAD | power_in | Thermal contact for heat dissipation; the thermal pad must be connected to electrical ground. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-28-EP(5x5) |+| Category | Amplifiers/Comparators |+| Pins | 29 |++## CAD (KiCad official)++- Symbol: `PGA870IRHDR`+- Footprint: `Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm`+- 3D model: VQFN-28-EP(5x5) (KiCad packages3D, STEP)+- 3D model files: `pga870irhdr-etched.step` / `pga870irhdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pga870irhdr.step` / `pga870irhdr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/pga870) (39 pp, sha256 `12ba1f4c47abcbd2`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/pga870irhdr-datasheet.pdf)
page.jsonadded+328@@ -0,0 +1,328 @@+{+ "slug": "pga870irhdr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Differential Amplifiers, VQFN-28-EP(5x5). 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digital thresholds are 0.9 V low and 2.1 V high."+ },+ {+ "number": "2",+ "name": "VS+",+ "type": "power_in",+ "description": "+5 V power supply; specified operating voltage 4.75 V to 5.25 V."+ },+ {+ "number": "3",+ "name": "IN+",+ "type": "input",+ "description": "Noninverting input; differential input resistance 150 Ω typical."+ },+ {+ "number": "4",+ "name": "VMID2",+ "type": "passive",+ "description": "Buffer output for the internal midsupply reference, not intended to drive an external load, and should be bypassed by a 0.1-μF capacitor."+ },+ {+ "number": "5",+ "name": "IN–",+ "type": "input",+ "description": "Inverting input; differential input resistance 150 Ω typical."+ },+ {+ "number": "6",+ "name": "VS+",+ "type": "power_in",+ "description": "+5 V power supply; specified operating voltage 4.75 V to 5.25 V."+ },+ {+ "number": "7",+ "name": "GAIN STROBE",+ "type": "input",+ "description": "Gain latch clock pin; data set-up time to GAIN STROBE low is 2.5 ns typical and hold time is 0 ns."+ },+ {+ "number": "8",+ "name": "B5 (MSB)",+ "type": "input",+ "description": "Gain control MSB of the 6-bit gain word."+ },+ {+ "number": "9",+ "name": "B4",+ "type": "input",+ "description": "Gain control bit 4."+ },+ {+ "number": "10",+ "name": "B3",+ "type": "input",+ "description": "Gain control bit 3."+ },+ {+ "number": "11",+ "name": "VS+",+ "type": "power_in",+ "description": "+5 V power supply; specified operating voltage 4.75 V to 5.25 V."+ },+ {+ "number": "12",+ "name": "B2",+ "type": "input",+ "description": "Gain control bit 2."+ },+ {+ "number": "13",+ "name": "B1",+ "type": "input",+ "description": "Gain control bit 1."+ },+ {+ "number": "14",+ "name": "B0 (LSB)",+ "type": "input",+ "description": "Gain control bit 0 (LSB)."+ },+ {+ "number": "15",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "16",+ "name": "VS+",+ "type": "power_in",+ "description": "+5 V power supply; specified operating voltage 4.75 V to 5.25 V."+ },+ {+ "number": "17",+ "name": "OUT–",+ "type": "output",+ "description": "Inverting output."+ },+ {+ "number": "18",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "19",+ "name": "OUT+",+ "type": "output",+ "description": "Noninverting output."+ },+ {+ "number": "20",+ "name": "VS+",+ "type": "power_in",+ "description": "+5 V power supply; specified operating voltage 4.75 V to 5.25 V."+ },+ {+ "number": "21",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "22",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "23",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "24",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "25",+ "name": "VS+",+ "type": "power_in",+ "description": "+5 V power supply; specified operating voltage 4.75 V to 5.25 V."+ },+ {+ "number": "26",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "27",+ "name": "PD",+ "type": "input",+ "description": "Active-low power-down for the analog circuitry (on above 2.1 V, off below 0.9 V); gain control CMOS circuitry stays active when PD is low."+ },+ {+ "number": "28",+ "name": "VMID1",+ "type": "passive",+ "description": "Chip bypass pin for the internal midsupply reference, not intended as an input, and should be bypassed with a 0.1-μF capacitor."+ },+ {+ "number": "29",+ "name": "PowerPAD",+ "type": "power_in",+ "description": "Thermal contact for heat dissipation; the thermal pad must be connected to electrical ground."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package hint says VQFN-28-EP(5x5). The excerpt names the package QFN-28 RHD (PowerPAD) and the packa; The thermal pad is not given a printed pin number in the datasheet text, so it is listed as 'EP' as ; Pin types for VMID1 and VMID2 are set to passive because the datasheet describes them as a reference",+ "exposed pad 29 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 9,+ "cost_usd": 0.0719,+ "at": "2026-10-07T21:43:52"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/pga870",+ "pages": 39,+ "sha256": "12ba1f4c47abcbd2",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 29,+ "described": 29,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "pga870irhdr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.92+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "e9d6d740f505b03e5aa0ac826330f9e269344b84656d051f50eb07ac162749eb",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "pga870irhdr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.92+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "26612aab613f92ef4b0bc495a24da0840a77e58dcfe3389fb4e8d4f087c51a36",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}