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pcm5102apwr: factory component page (tier=mfr)

Ray ·14ae041fa2 ·26d ago ·parent da8a61e
1 file changed +194−8
page.json+194−8
@@ -1,13 +1,204 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "pcm5102apwr",+  "title": "PCM5102APWR",+  "brief": "Texas Instruments ADCs/DACs - Special Purpose, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments ADCs/DACs - Special Purpose, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "data acquisition",     "pcm5102apwr"   ],+  "component": {+    "mpn": "PCM5102APWR",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-20",+    "pin_count": 20,+    "category": "Data Acquisition",+    "subcategory": "ADCs/DACs - Special Purpose",+    "datasheet": "https://www.ti.com/lit/ds/symlink/pcm5102a.pdf",+    "parts": {+      "symbol": "pcm5102apwr.kicad_sym",+      "footprint": "pcm5102apwr.kicad_mod",+      "model_3d": "pcm5102apwr.glb",+      "model_3d_step": "pcm5102apwr.step",+      "lbr": "pcm5102apwr.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "CPVDD",+        "type": "power_in",+        "description": "Charge pump power supply, 3.3 V nominal (3.1 V-3.46 V). Powers the internal DirectPath charge pump that generates the negative rail for ground-centered outputs. Referenced to CPGND."+      },+      {+        "number": "2",+        "name": "CAPP",+        "type": "passive",+        "description": "Charge pump flying capacitor terminal for the positive rail. Connect the flying capacitor between CAPP and CAPM."+      },+      {+        "number": "3",+        "name": "CPGND",+        "type": "power_in",+        "description": "Charge pump ground return. Must be tied to system ground (within 0.2 V of other grounds)."+      },+      {+        "number": "4",+        "name": "CAPM",+        "type": "passive",+        "description": "Charge pump flying capacitor terminal for the negative rail. Connect the flying capacitor between CAPP and CAPM."+      },+      {+        "number": "5",+        "name": "VNEG",+        "type": "power_out",+        "description": "Negative charge-pump rail output, nominally \u22123.3 V. Requires a decoupling capacitor to CPGND; do not load externally."+      },+      {+        "number": "6",+        "name": "OUTL",+        "type": "output",+        "description": "Analog line-level output from the DAC left channel. 2.1 VRMS full-scale, ground-centered (no DC blocking cap required). Load 1 k\u03a9 min, 10 k\u03a9 typ."+      },+      {+        "number": "7",+        "name": "OUTR",+        "type": "output",+        "description": "Analog line-level output from the DAC right channel. 2.1 VRMS full-scale, ground-centered (no DC blocking cap required). Load 1 k\u03a9 min, 10 k\u03a9 typ."+      },+      {+        "number": "8",+        "name": "AVDD",+        "type": "power_in",+        "description": "Analog power supply, 3.3 V nominal (3.0-3.46 V in VCOM mode). Referenced to AGND."+      },+      {+        "number": "9",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground. Tie to system ground; all grounds must be within 0.2 V of each other."+      },+      {+        "number": "10",+        "name": "DEMP",+        "type": "input",+        "description": "De-emphasis control for 44.1 kHz sampling rate. Low = de-emphasis off, High = de-emphasis on. Failsafe LVCMOS Schmitt-trigger input."+      },+      {+        "number": "11",+        "name": "FLT",+        "type": "input",+        "description": "Digital filter select. Low = normal latency (20 tS), High = low latency (3.5 tS). Failsafe LVCMOS Schmitt-trigger input."+      },+      {+        "number": "12",+        "name": "SCK",+        "type": "input",+        "description": "System (master) clock input, up to 50 MHz. Failsafe LVCMOS Schmitt-trigger input. Tie low to use the internal PLL-generated clock referenced to BCK."+      },+      {+        "number": "13",+        "name": "BCK",+        "type": "input",+        "description": "Audio serial-port bit clock input (I\u00b2S BCK). Failsafe LVCMOS Schmitt-trigger input."+      },+      {+        "number": "14",+        "name": "DIN",+        "type": "input",+        "description": "Audio serial-port data input (I\u00b2S / Left-justified PCM). Failsafe LVCMOS Schmitt-trigger input; accepts 16-, 24-, or 32-bit data."+      },+      {+        "number": "15",+        "name": "LRCK",+        "type": "input",+        "description": "Audio serial-port word (frame) clock input (L/R clock). Failsafe LVCMOS Schmitt-trigger input."+      },+      {+        "number": "16",+        "name": "FMT",+        "type": "input",+        "description": "Audio data format select. Low = I\u00b2S, High = Left-justified. Failsafe LVCMOS Schmitt-trigger input."+      },+      {+        "number": "17",+        "name": "XSMT",+        "type": "input",+        "description": "Soft mute control (active low). Low = soft mute, High = soft un-mute. Failsafe LVCMOS Schmitt-trigger input; used to gate the analog mute for pop-free start/stop."+      },+      {+        "number": "18",+        "name": "LDOO",+        "type": "power_out",+        "description": "Internal LDO output for logic supply rail - used for decoupling when running the internal 1.8 V regulator, or connect an external 1.8 V supply here when bypassing the LDO."+      },+      {+        "number": "19",+        "name": "DGND",+        "type": "power_in",+        "description": "Digital ground. Tie to system ground; all grounds must be within 0.2 V of each other."+      },+      {+        "number": "20",+        "name": "DVDD",+        "type": "power_in",+        "description": "Digital power supply, 1.8 V (1.65-1.95 V) or 3.3 V (3.1-3.46 V) referenced to DGND."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/pcm5102a.pdf",+        "pages": 44,+        "sha256": "a522083606b8e994",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 20,+        "described": 20,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "TSSOP-20",+      "Category": "Data Acquisition",+      "Pins": "20"+    }+  },+  "variants": [+    {+      "mpn": "PCM5102APWR",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "pcm5102apwr"+  ],+  "discovery_pitch": "PCM5102APWR (Texas Instruments) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +216,5 @@     "docs/pcm5102apwr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file