PAM8403DR-H

@@ -0,0 +1,55 @@+# PAM8403DR-H++**Diodes Incorporated** · Audio Power OpAmps · SOIC-16++PAM8403DR-H from Diodes Incorporated, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | +OUT_L | output | Left channel positive Class-D bridge output. Drives one terminal of the left speaker directly (filterless BTL output). |+| 2 | PGND | power_in | Power ground return for the left-channel Class-D output stage. Should be tied to the system ground plane with low-impedance routing. |+| 3 | -OUT_L | output | Left channel negative Class-D bridge output. Drives the opposite terminal of the left speaker (BTL pair with +OUT_L). |+| 4 | PVDD | power_in | Power supply input for the left-channel Class-D output stage. 2.5V to 5.5V, absolute max 6.0V. Bypass locally with a bulk capacitor (typ. 470 uF) and a 0.1 uF ceramic. |+| 5 | MUTE | input | Mute control input, active low. Drive high (VIH >= 1.5V) for normal operation; drive low (VIL <= 0.4V) to mute both channels. Muting current typ. 3.5 mA when VMUTE = 0.3V. |+| 6 | VDD | power_in | Analog supply input for the internal signal-path circuitry. 2.5V to 5.5V, tied to the same rail as PVDD in typical applications; bypass with a 1 uF ceramic to GND. |+| 7 | INL | input | Left-channel single-ended analog audio input. AC-coupled through an input capacitor (typ. 0.47 uF) from the source. Closed-loop gain is typ. 24 dB. |+| 8 | VREF | passive | Internal analog reference (mid-supply bias). Connect a bypass capacitor (typ. 0.1 uF-1 uF) from this pin to GND; do not load externally. |+| 9 | NC | unconnected | No connect. Leave floating or tie to GND for mechanical support; do not use for signal routing. |+| 10 | INR | input | Right-channel single-ended analog audio input. AC-coupled through an input capacitor (typ. 0.47 uF) from the source. Closed-loop gain is typ. 24 dB. |+| 11 | GND | power_in | Analog ground reference for the signal-path circuitry. Connect to the system ground plane; keep separate from the PGND return path back to the star point. |+| 12 | SHDN | input | Shutdown control input, active low. Drive high (VIH >= 1.5V) to enable the device; drive low (VIL <= 0.4V) to enter shutdown (ISD < 1 uA typ.). |+| 13 | PVDD | power_in | Power supply input for the right-channel Class-D output stage. 2.5V to 5.5V, absolute max 6.0V. Bypass locally with a bulk capacitor (typ. 470 uF) and a 0.1 uF ceramic. |+| 14 | -OUT_R | output | Right channel negative Class-D bridge output. Drives one terminal of the right speaker directly (filterless BTL output). |+| 15 | PGND | power_in | Power ground return for the right-channel Class-D output stage. Should be tied to the system ground plane with low-impedance routing. |+| 16 | +OUT_R | output | Right channel positive Class-D bridge output. Drives the opposite terminal of the right speaker (BTL pair with -OUT_R). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Diodes Incorporated |+| Package | SOIC-16 |+| Category | Op-amp/Cmp |+| Pins | 16 |++## Ordering variants++- `PAM8403DR-H`++## CAD (KiCad official)++- Symbol: `PAM8403DR-H`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/PAM8403DR-H.pdf) (11 pp, sha256 `9d853d04cace827e`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/pam8403dr-h-datasheet.pdf)

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