opa2350ea

@@ -33,5 +33,79 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "OPA2350EA",+    "manufacturer": "Texas Instruments",+    "package": "VSSOP-8",+    "pin_count": 8,+    "category": "Operational Amplifier",+    "datasheet": "https://www.ti.com/lit/ds/symlink/opa2350ea.pdf",+    "parts": {+      "symbol": "opa2350ea.kicad_sym",+      "footprint": "opa2350ea.kicad_mod",+      "model_3d": "opa2350ea-etched.glb",+      "model_3d_plain": "opa2350ea.glb",+      "model_3d_step": "opa2350ea-etched.step",+      "model_3d_step_plain": "opa2350ea.step",+      "lbr": "opa2350ea.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "OUT_A",+        "type": "output",+        "description": "Output of channel A. Class-AB rail-to-rail output stage; swings to within ~10 mV of the supply rails with a 10-kΩ load. Short-circuit current ±80 mA typical; continuous output current ±40 mA typical."+      },+      {+        "number": "2",+        "name": "-IN_A",+        "type": "input",+        "description": "Inverting input of channel A. High-impedance CMOS gate input (10^13 Ω differential, ~13 pF common-mode). Input bias current ±0.5 pA typical. Input common-mode range: (V-) - 0.1 V to (V+) + 0.1 V."+      },+      {+        "number": "3",+        "name": "+IN_A",+        "type": "input",+        "description": "Noninverting input of channel A. High-impedance CMOS gate input (10^13 Ω differential, ~13 pF common-mode). Complementary N/P input pair supports rail-to-rail common-mode operation. Diode-clamped to supply rails; limit external current to 10 mA if driven beyond rails."+      },+      {+        "number": "4",+        "name": "V-",+        "type": "power_in",+        "description": "Negative power supply (or ground for single-supply operation). Total supply (V+) - (V-) range 2.7 V to 5.5 V (specified), 2.5 V to 5.5 V operational. Bypass to V+ (or GND) with a low-ESR 0.1-µF ceramic capacitor placed close to the pin."+      },+      {+        "number": "5",+        "name": "+IN_B",+        "type": "input",+        "description": "Noninverting input of channel B. High-impedance CMOS gate input with rail-to-rail common-mode range extending 100 mV beyond each supply rail. Diode-clamped to the supplies; keep current below 10 mA for over-range signals."+      },+      {+        "number": "6",+        "name": "-IN_B",+        "type": "input",+        "description": "Inverting input of channel B. High-impedance CMOS gate input (10^13 Ω differential). Input offset current ±0.5 pA typical. Channel B is fully independent of channel A for low crosstalk."+      },+      {+        "number": "7",+        "name": "OUT_B",+        "type": "output",+        "description": "Output of channel B. Class-AB rail-to-rail output stage capable of driving 600-Ω loads. Short-circuit current ±80 mA typical; open-loop gain 122 dB typical at RL = 10 kΩ."+      },+      {+        "number": "8",+        "name": "V+",+        "type": "power_in",+        "description": "Positive power supply. 2.7 V to 5.5 V specified (2.5 V to 5.5 V operational) relative to V-. Quiescent current 5.2 mA per amplifier typical (10.4 mA total for the dual). Bypass to V- (or GND) with a 0.1-µF low-ESR ceramic capacitor located close to the pin."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}