OP07CDRG

@@ -0,0 +1,52 @@+# OP07CDRG++**HANSCHIP semiconductor** · Operational Amplifier · SOIC-8++OP07CDRG from HANSCHIP semiconductor, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Offset Null 1 | passive | Offset nulling terminal 1. Connect one end of a 20 kΩ potentiometer here; wiper goes to VCC+ (see Figure 2). Used together with pin 8 to trim the residual input offset voltage. |+| 2 | Inverting Input | input | Inverting analog input (−) of the op-amp. Differential input voltage rating ±30 V, single-ended input voltage rating ±16 V. Differential input resistance ~33 MΩ typical. |+| 3 | Non-inverting Input | input | Non-inverting analog input (+) of the op-amp. Differential input voltage rating ±30 V, single-ended input voltage rating ±16 V. Input common-mode range typically ±13.5 V at ±15 V supply. |+| 4 | VCC- | power_in | Negative supply rail. Together with VCC+ supports a total supply range of ±3 V to ±16 V. Typical quiescent supply current 2.7 mA (5 mA max). |+| 5 | N.C. | unconnected | No internal connection. Leave floating or tie to a convenient node; not electrically bonded to the die. |+| 6 | Output | output | Op-amp output. Typical output voltage swing ±13 V into 10 kΩ, ±12.8 V into 2 kΩ (at ±15 V supply). Open-loop output resistance ~60 Ω; slew rate 0.17 V/µs typical. |+| 7 | VCC+ | power_in | Positive supply rail. Together with VCC- supports a total supply range of ±3 V to ±16 V. Also serves as the reference tap for the offset-null potentiometer (see Figure 2). |+| 8 | Offset Null 2 | passive | Offset nulling terminal 2. Connect the other end of a 20 kΩ potentiometer here; wiper to VCC+ (see Figure 2). Used with pin 1 to trim residual input offset voltage. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | HANSCHIP semiconductor |+| Package | SOIC-8 |+| Category | Op-amp/Cmp |+| Pins | 8 |++## Ordering variants++- `OP07CDRGCDRG`+- `OP07CDRGDDRG`+- `OP07CDRGCPG`+- `OP07CDRGDPG`+- `OP07CDRGCDGKRG`+- `OP07CDRGDDGKRG`++## CAD (KiCad official)++- Symbol: `OP07CDRG`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [HANSCHIP semiconductor datasheet](docs/op07cdrg-datasheet.pdf) (8 pp, sha256 `e7475c08ad477737`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/op07cdrg-datasheet.pdf)

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