NL17SZ08DFT2G

@@ -0,0 +1,46 @@+# NL17SZ08DFT2G++**onsemi** · Gates · SOT-353++NL17SZ08DFT2G from onsemi, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN B | input | Input B of the 2-input AND gate. CMOS logic input, overvoltage tolerant up to 5.5 V independent of VCC. VIH = 0.75*VCC (1.65-1.95 V range) or 0.7*VCC (2.3-5.5 V range). |+| 2 | IN A | input | Input A of the 2-input AND gate. CMOS logic input, overvoltage tolerant up to 5.5 V independent of VCC. VIH = 0.75*VCC (1.65-1.95 V range) or 0.7*VCC (2.3-5.5 V range). |+| 3 | GND | power_in | Ground reference (0 V) for the device. |+| 4 | OUT Y | output | AND gate output Y = A AND B. Push-pull CMOS output, source/sink 24 mA at VCC = 3.0 V. |+| 5 | VCC | power_in | Positive supply voltage, 1.65 V to 5.5 V operating range (absolute maximum 7.0 V). Quiescent supply current is typically 1 uA (10 uA max) at VCC = 5.5 V. Decoupling capacitor recommended near this pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOT-353 |+| Category | Logic |+| Pins | 5 |++## Ordering variants++- `NL17SZ08DFT2GDFT2G`+- `NL17SZ08DFT2GXV5T2G`+- `NL17SZ08DFT2GP5T5G`++## CAD (KiCad official)++- Symbol: `NL17SZ08DFT2G`+- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`+- 3D model: SOT-353 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/nl17sz08dft2-d.pdf) (7 pp, sha256 `84ecb32b1632703a`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/nl17sz08dft2g-datasheet.pdf)

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