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NCV8502DADJR2G
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onsemi Linear Voltage Regulators (LDO), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+88docs/hero.pngdocs/ncv8502dadjr2g-datasheet.pdf+4714ncv8502dadjr2g-etched.glbncv8502dadjr2g-hero.glbncv8502dadjr2g-hero.overlay.json+260ncv8502dadjr2g.glbncv8502dadjr2g.kicad_mod+300ncv8502dadjr2g.kicad_sym+45ncv8502dadjr2g.lbr+130ncv8502dadjr2g.step+3030package.json+194page.json+200viewers/footprint.html+1viewers/symbol.html+1README.mdadded+88@@ -0,0 +1,88 @@+# NCV8502DADJR2G++**onsemi** · Linear Voltage Regulators (LDO) · SOP-8++NCV8502DADJR2G from onsemi, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VIN | power_in | Input voltage; dc rating -15 to 48 V, 60 V peak transient (46 V load dump at VIN = 14 V). |+| 2 | MON | input | Monitor input for the early warning comparator (typical threshold 1.20 V); connect to VOUT if not needed. |+| 3 | NC | unconnected | No connection. |+| 4 | NC | unconnected | No connection. |+| 5 | GND | power_in | Ground; all GND leads must be connected to ground. |+| 6 | FLAG | output | Open collector output from the early warning comparator. |+| 7 | VADJ | input | Voltage adjust input; a resistor divider from VOUT to this lead sets the output voltage (unity gain threshold 1.28 V typical). |+| 8 | VOUT | power_out | Regulated output, ±2.0% accuracy, 150 mA output current. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOP-8 |+| Category | Power Supply Chip |+| Pins | 8 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Output Voltage, Adjustable Option | VOUT | 1.254 | 1.28 | 1.306 | V | VOUT = VADJ (Unity Gain), 6.5 V < VIN < 16 V, 100 µA < IOUT < 150 mA | 3 |+| Output Voltage, Adjustable Option | VOUT | 1.242 | 1.28 | 1.318 | V | VOUT = VADJ (Unity Gain), 5.5 V < VIN < 26 V, 100 µA < IOUT < 150 mA | 3 |+| Dropout Voltage (VIN − VOUT) | | | 400 | 600 | mV | IOUT = 150 mA (Adj. > 5.0 V options only) | 3 |+| Dropout Voltage (VIN − VOUT) | | | 100 | 150 | mV | IOUT = 1.0 mA (Adj. > 5.0 V options only) | 3 |+| Load Regulation | | -30 | 5 | 30 | mV | VIN = 14 V, 5.0 mA ≤ IOUT ≤ 150 mA | 3 |+| Line Regulation | | | 15 | 60 | mV | [VOUT(Typ) + 1.0] < VIN < 26 V, IOUT = 1.0 mA | 3 |+| Quiescent Current, Low Load, Adjustable Option | IQ | | 50 | 75 | µA | IOUT = 100 µA, VIN = 12 V, MON = VOUT | 3 |+| Quiescent Current, Medium Load | IQ | | 4 | 6 | mA | IOUT = 75 mA, VIN = 14 V, MON = VOUT | 3 |+| Quiescent Current, High Load | IQ | | 12 | 19 | mA | IOUT = 150 mA, VIN = 14 V, MON = VOUT | 3 |+| Current Limit | | 151 | 300 | | mA | | 3 |+| Short Circuit Output Current | | 40 | 190 | | mA | VOUT = 0 V | 4 |+| Thermal Shutdown (Guaranteed by Design) | | 150 | 180 | | °C | | 4 |+| Monitor Threshold | | 1.1 | 1.2 | 1.31 | V | Increasing and Decreasing | 4 |+| Monitor Hysteresis | | 20 | 50 | 100 | mV | | 4 |+| Monitor Input Current | | -0.5 | 0.1 | 0.5 | µA | MON = 2.0 V | 4 |+| FLAG Output Saturation Voltage | | | 0.1 | 0.4 | V | MON = 0 V, IFLAG = 1.0 mA | 4 |+| Voltage Adjust Input Current | | -0.5 | | 0.5 | µA | VADJ = 1.28 V | 4 |+| Input Voltage (dc) | VIN | -15 | | 48 | V | | 2 |+| Peak Transient Voltage | | | | 60 | V | 46 V Load Dump @ VIN = 14 V | 2 |+| Operating Voltage | | | | 45 | V | | 2 |+| Output Voltage (dc) | VOUT | -0.3 | | 16 | V | | 2 |+| Voltage Range (RESET, FLAG) | | -0.3 | | 10 | V | | 2 |+| Input Voltage Range (MON, VADJ, RADJ) | | -0.3 | | 10 | V | | 3 |+| ESD Susceptibility (Human Body Model) | | | | 2 | kV | | 3 |+| Junction Temperature | TJ | -40 | | 150 | °C | | 3 |+| Storage Temperature | TS | -55 | | 150 | °C | | 3 |+| Lead Temperature Soldering, Reflow | SLD | | | 265 | °C | SMD style only, Pb-Free, 60-150 sec above 217°C, 40 sec max at peak | 3 |+| Thermal Resistance Junction-to-Case, SO-8 | RθJC | | 45 | | °C/W | SO-8 | 3 |+| Thermal Resistance Junction-to-Ambient, SO-8 | RθJA | | 165 | | °C/W | SO-8 | 3 |++## Materials and finish++As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).++| Part | Material | Colour / plating | Datasheet says | Page |+|---|---|---|---|---|+| contacts | Copper | | Figure 20. 16 Lead SOW (Exposed Pad), JA as a Function of the Pad Copper Area (2 oz. Cu | 11 |++## CAD (KiCad official)++- Symbol: `NCV8502DADJR2G`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8 (KiCad packages3D, STEP)+- 3D model files: `ncv8502dadjr2g-etched.step` / `ncv8502dadjr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncv8502dadjr2g.step` / `ncv8502dadjr2g.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/ncv8502dadjr2-d.pdf) (16 pp, sha256 `589257987b212a20`, retrieved 2026-10-24, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ncv8502dadjr2g-datasheet.pdf)
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regulators. Their output current capability is 150 mA. The family has
output voltage options for adjustable, 2.5 V, 3.3 V, 5.0 V, 8.0 V, and 10 V.
The output voltage is accurate within ±2.0% with a maximum
dropout voltage of 0.6 V at 150 mA. Low quiescent current is a feature
drawing only 90 A with a 100 A load. This part is ideal for any and
all battery operated microprocessor equipment.
Microprocessor control logic includes an active RESET (with
DELAY), and a FLAG monitor which can be used to provide an early
warning signal to the microprocessor of a potential impending RESET
signal. The use of the FLAG monitor allows the microprocessor to
finish any signal processing before the RESET shuts the
microprocessor down.
The active RESET circuit operates correctly at an output voltage as
low as 1.0 V. The RESET function is activated during the power up
sequence or during normal operation if the output voltage drops
outside the regulation limits.
The reset threshold voltage can be decreased by the connection of
external resistor divider to RADJ lead.
The regulator is protected against reverse battery, short circuit, and
thermal overload conditions. The device can withstand load dump
transients making it suitable for use in automotive environments. The
device has also been optimized for EMC conditions.</pdf:Keywords>+ <dc:format>application/pdf</dc:format>+ <dc:title>+ <rdf:Alt>+ <rdf:li xml:lang="x-default">LDO Linear Regulators - Micropower, DELAY, Adjustable RESET, and Monitor FLAG 150 mA</rdf:li>+ </rdf:Alt>+ </dc:title>+ <dc:creator>+ <rdf:Seq>+ <rdf:li>ON Semiconductor</rdf:li>+ </rdf:Seq>+ </dc:creator>+ <dc:subject>+ <rdf:Bag>+ <rdf:li>The NCV8502 is a family of precision micropower voltage</rdf:li>+ <rdf:li>regulators. Their output current capability is 150 mA. The family has</rdf:li>+ <rdf:li>output voltage options for adjustable</rdf:li>+ <rdf:li>2.5 V</rdf:li>+ <rdf:li>3.3 V</rdf:li>+ <rdf:li>5.0 V</rdf:li>+ <rdf:li>8.0 V</rdf:li>+ <rdf:li>and 10 V.</rdf:li>+ <rdf:li>The output voltage is accurate within ±2.0% with a maximum</rdf:li>+ <rdf:li>dropout voltage of 0.6 V at 150 mA. Low quiescent current is a feature</rdf:li>+ <rdf:li>drawing only 90</rdf:li>+ <rdf:li>A with a 100</rdf:li>+ <rdf:li>A load. This part is ideal for any and</rdf:li>+ <rdf:li>all battery operated microprocessor equipment.</rdf:li>+ <rdf:li>Microprocessor control logic includes an active RESET (with</rdf:li>+ <rdf:li>DELAY)</rdf:li>+ <rdf:li>and a FLAG monitor which can be used to provide an early</rdf:li>+ <rdf:li>warning signal to the microprocessor of a potential impending RESET</rdf:li>+ <rdf:li>signal. The use of the FLAG monitor allows the microprocessor to</rdf:li>+ <rdf:li>finish any signal processing before the RESET shuts the</rdf:li>+ <rdf:li>microprocessor down.</rdf:li>+ <rdf:li>The active RESET circuit operates correctly at an output voltage as</rdf:li>+ <rdf:li>low as 1.0 V. The RESET function is activated during the power up</rdf:li>+ <rdf:li>sequence or during normal operation if the output voltage drops</rdf:li>+ <rdf:li>outside the regulation limits.</rdf:li>+ <rdf:li>The reset threshold voltage can be decreased by the connection of</rdf:li>+ <rdf:li>external resistor divider to RADJ lead.</rdf:li>+ <rdf:li>The regulator is protected against reverse battery</rdf:li>+ <rdf:li>short circuit</rdf:li>+ <rdf:li>and</rdf:li>+ <rdf:li>thermal overload conditions. The device can withstand load dump</rdf:li>+ <rdf:li>transients making it suitable for use in automotive environments. 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