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NCV303LSN45T1G
Public Made by Adomby adom
onsemi Supervisor And Reset ICs, TSOP-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+72docs/hero.pngdocs/ncv303lsn45t1g-datasheet.pdf+5195ncv303lsn45t1g-etched.glbncv303lsn45t1g-hero.glbncv303lsn45t1g-hero.overlay.json+194ncv303lsn45t1g.glbncv303lsn45t1g.kicad_mod+199ncv303lsn45t1g.kicad_sym+33ncv303lsn45t1g.lbr+116ncv303lsn45t1g.step+2128package.json+175page.json+181viewers/footprint.html+1viewers/symbol.html+1README.mdadded+72@@ -0,0 +1,72 @@+# NCV303LSN45T1G++**onsemi** · Supervisor And Reset ICs · TSOP-5++NCV303LSN45T1G from onsemi, in a TSOP-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Reset Output | output | Active-low reset output of the NCP303 open-drain N-channel type, which can be pulled up to VP through RP; the maximum output voltage is 12 V and the maximum output current is 70 mA. |+| 2 | Input | input | Monitored supply input (Vin) for the undervoltage detector, rated to a maximum of 12 V, with a specified operating voltage range of 0.8 V to 10 V. |+| 3 | GND | power_in | Ground reference pin for the device. |+| 4 | N.C. | unconnected | No internal connection; the datasheet does not specify a function for this pin. |+| 5 | CD | passive | Delay capacitor pin that sets the reset time delay tD via an external capacitor, with an internal pull-up of about 1.0 MΩ and a voltage range of −0.3 V to Vin + 0.3 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | TSOP-5 |+| Category | Power Management (PMIC) |+| Pins | 5 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Detector Threshold (Pin 2, Vin Decreasing), TA = 25°C | VDET− | 4.41 | 4.5 | 4.59 | V | (TA = 25°C) | 5 |+| Detector Threshold (Pin 2, Vin Decreasing), TA = −40°C to 125°C | VDET− | 4.365 | | 4.635 | V | (TA = −40°C to 125°C) | 5 |+| Detector Threshold Hysteresis (Pin 2, Vin Increasing) | VHYS | 0.135 | 0.225 | 0.315 | V | | 5 |+| Supply Current (Pin 2), Vin = 4.34 V | Iin | | 0.33 | 1 | A | (Vin = 4.34 V) | 5 |+| Supply Current (Pin 2), Vin = 6.5 V | Iin | | 0.52 | 1.4 | A | (Vin = 6.5 V) | 5 |+| Minimum Operating Voltage (Pin 2), TA = 25°C | Vin(min) | | 0.55 | 0.7 | V | (TA = 25°C) | 5 |+| Minimum Operating Voltage (Pin 2), TA = −40°C to 125°C | Vin(min) | | 0.65 | 0.8 | V | (TA = −40°C to 125°C) | 5 |+| Maximum Operating Voltage (Pin 2) | Vin(max) | | | 10 | V | | 5 |+| Reset Output Current (Active Low 'L') Nch Sink Current, NCP302, NCP303 | IOUT | 0.01 | 0.05 | | mA | (VOUT = 0.05 V, Vin = 0.70 V) | 5 |+| Reset Output Current (Active Low 'L') Nch Sink Current, NCP302, NCP303 | IOUT | 1 | 2 | | mA | (VOUT = 0.50 V, Vin = 1.5 V) | 5 |+| CD Delay Pin Threshold Voltage (Pin 5) | VTCD | 2.25 | 3.04 | 3.83 | V | (Vin = 4.95 V) | 6 |+| Delay Capacitor Pin Sink Current (Pin 5) | ICD | 2 | 200 | | A | (Vin = 0.7 V, VCD = 0.1 V) | 6 |+| Delay Capacitor Pin Sink Current (Pin 5) | ICD | 120 | 1600 | | A | (Vin = 1.5 V, VCD = 0.5 V) | 6 |+| Delay Pullup Resistance (Pin 5) | RD | 0.5 | 1 | 2 | M | | 6 |+| Input Power Supply Voltage (Pin 2) | Vin | | | 12 | V | | 2 |+| Output Voltage (Pin 1), N-Channel Open Drain | VOUT | -0.3 | | 12 | V | N-Channel Open Drain (NCP303) | 2 |+| Delay Capacitor Pin Voltage (Pin 5) | VCD | -0.3 | | | V | Printed upper limit is Vin + 0.3 V | 2 |+| Output Current (Pin 1) | IOUT | | | 70 | mA | | 2 |+| Operating Ambient Temperature Range | TA | -40 | | 125 | °C | All Voltage Options: 1.2 V to 4.9 V | 2 |+| Maximum Junction Temperature | TJ | | | 150 | °C | | 2 |+| Storage Temperature Range | Tstg | -55 | | 150 | °C | | 2 |+| Thermal Resistance Junction-to-Air | RJA | | | 250 | °C/W | | 2 |+| Latchup Performance, Positive | ILATCHUP | | | 200 | mA | Positive (Note 3, JESD78) | 2 |+| Latchup Performance, Negative | ILATCHUP | | | 200 | mA | Negative (Note 3, JESD78) | 2 |++## CAD (KiCad official)++- Symbol: `NCV303LSN45T1G`+- Footprint: `Package_SO:TSOP-5_1.65x3.05mm_P0.95mm`+- 3D model: TSOP-5 (KiCad packages3D, STEP)+- 3D model files: `ncv303lsn45t1g-etched.step` / `ncv303lsn45t1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncv303lsn45t1g.step` / `ncv303lsn45t1g.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588910895455997952) (27 pp, sha256 `625daa7711ef4912`, retrieved 2026-10-17, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ncv303lsn45t1g-datasheet.pdf)
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