component
NCP5661DTADJRKG
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onsemi Linear Voltage Regulators (LDO), TO-252-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+76docs/hero.pngdocs/ncp5661dtadjrkg-datasheet.pdf+4175ncp5661dtadjrkg-etched.glbncp5661dtadjrkg-hero.glbncp5661dtadjrkg-hero.overlay.json+216ncp5661dtadjrkg.glbncp5661dtadjrkg.kicad_mod+358ncp5661dtadjrkg.kicad_sym+37ncp5661dtadjrkg.lbr+140ncp5661dtadjrkg.step+4655package.json+184page.json+190viewers/footprint.html+1viewers/symbol.html+1README.mdadded+76@@ -0,0 +1,76 @@+# NCP5661DTADJRKG++**onsemi** · Linear Voltage Regulators (LDO) · TO-252-5++NCP5661DTADJRKG from onsemi, in a TO-252-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Enable | input | On/off control of the regulator: connect to Ground to disable the device, or to Vin if the function is not used (threshold high 1.3 V min, low 0.3 V max). |+| 2 | Vin | power_in | Positive power supply input voltage, operating range 2.0 V to 9.0 V (absolute maximum 18 V). |+| 3 | Ground | power_in | Power supply ground; the TAB is also connected to Ground. |+| 4 | Vout | power_out | Regulated output voltage, up to 1.0 A load current, requiring output capacitance Cout > 10 µF for stability. |+| 5 | Adj | input | Connected to the resistor divider network that programs the output voltage against the 0.9 V reference (adjustable version, typical Adj pin current 40 nA). |+| 6 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | TO-252-5 |+| Category | Power Supply Chip |+| Pins | 6 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Input Voltage | Vin | 2 | | 9 | V | Adjustable output version | 3 |+| Output Voltage Accuracy | Vout | -1 | | 1 | % | TJ = 25°C (Iout = 10 mA to 1.0 A) | 3 |+| Output Voltage Accuracy | Vout | -1.5 | | 1.5 | % | TJ = -20 to +125°C (Iout = 10 mA to 1.0 A) | 3 |+| Output Voltage Accuracy | Vout | -2 | | 2 | % | TJ = -40 to +150°C (Iout = 10 mA to 1.0 A) | 3 |+| Dropout Voltage | VDO | | 1 | 1.3 | V | Iout = 1.0 A | 3 |+| Peak Output Current Limit | Iout | 1 | | | A | | 3 |+| Ground Current | Iq | | 1.3 | 3 | mA | Iout = 1.0 A | 3 |+| Disabled State Ground Current | Iqds | | 10 | 300 | A | Disabled State | 3 |+| Enable Input Threshold Voltage High | Ven | 1.3 | | | V | Voltage Increasing, On State, Logic High | 3 |+| Enable Input Threshold Voltage Low | Ven | | | 0.3 | V | Voltage Decreasing, Off State, Logic Low | 3 |+| Output Noise Voltage | Vn | | 26 | | Vrms | f = 10 Hz to 100 kHz | 3 |+| Adjustable Pin Input Current | Iadj | | 40 | | nA | | 3 |+| Line Regulation | REGline | | 0.03 | | % | Iout = 10 mA, Vout+1.5 V < Vin < 7.0 V | 3 |+| Load Regulation | REGload | | 0.03 | | % | 10 mA < Iout < 1.0 A | 3 |+| Internal Current Limitation | Ilim | | 1.5 | | A | | 3 |+| Ripple Rejection | RR | | 70 | | dB | 120 Hz | 3 |+| Ripple Rejection | RR | | 65 | | dB | 1.0 kHz | 3 |+| Thermal Shutdown | TSHD | | 160 | | °C | Guaranteed by Design | 3 |+| Enable Input Current | Ien | | 0.5 | | A | Enable Pin Voltage = 0.3 Vmax | 3 |+| Input Voltage (max rating) | Vin | | | 18 | V | | 2 |+| Output Pin Voltage | Vout | -0.3 | | | V | -0.3 to Vin +0.3 | 2 |+| Adjust Pin Voltage | Vadj | -0.3 | | | V | -0.3 to Vin +0.3 | 2 |+| Enable Pin Voltage | Ven | -0.3 | | | V | -0.3 to Vin +0.3 | 2 |+| Operating Junction Temperature Range | TJ | -40 | | 150 | °C | | 2 |+| Storage Temperature Range | Tstg | -55 | | 150 | °C | | 2 |+| Thermal Resistance, Junction-to-Air | RθJA | | 100 | | °C/W | DPAK-5, 1 oz copper, 0.26 in2 copper area (minimum pad) | 2 |+| Thermal Resistance, Junction-to-Case | RθJC | | 8 | | °C/W | DPAK-5 | 2 |++## CAD (KiCad official)++- Symbol: `NCP5661DTADJRKG`+- Footprint: `Package_TO_SOT_SMD:TO-252-5_TabPin6`+- 3D model: TO-252-5 (KiCad packages3D, STEP)+- 3D model files: `ncp5661dtadjrkg-etched.step` / `ncp5661dtadjrkg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncp5661dtadjrkg.step` / `ncp5661dtadjrkg.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/ncp5661dtadjrk-d.pdf) (13 pp, sha256 `a3b1428afdd1ab29`, retrieved 2026-10-23, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ncp5661dtadjrkg-datasheet.pdf)
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