component
NCP4306AADZZZADR2G
Public Made by Adomby adom
onsemi AC-DC Controllers & Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+119@@ -0,0 +1,119 @@+# NCP4306AADZZZADR2G++**onsemi** · AC-DC Controllers & Regulators · SOIC-8++NCP4306AADZZZADR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC | power_in | Supply voltage pin; the device operates up to VCC = 35 V. |+| 2 | MIN_TOFF | passive | Adjusts the minimum off time period by connecting a resistor to ground. |+| 3 | MIN_TON | passive | Adjusts the minimum on time period by connecting a resistor to ground. |+| 4 | LLD | input | Input that modulates the driver clamp level and/or turns the driver off during light load conditions. |+| 5 | TRIG/DIS | input | Ultrafast turn-off input used to turn off the SR MOSFET in CCM applications to improve efficiency; activates disable mode if pulled up for more than 100 μs. |+| 6 | CS | input | Current sense pin that detects whether current flows through the SR MOSFET and/or its body diode; rugged up to 200 V. |+| 7 | GND | power_in | Ground for the SR MOSFET driver, VCC decoupling capacitor, MIN_TON/MIN_TOFF resistors, LLD and trigger inputs; wire directly to the SR MOSFET source using Kelvin connection. |+| 8 | DRV | output | Driver output for the SR MOSFET with 7 A sink / 2 A source peak current capability. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-8 |+| Category | Power Supply Chip |+| Pins | 8 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| VCC UVLO rising | VCCON | 3.7 | 4 | 4.2 | V | VCC rising | 7 |+| VCC UVLO falling | VCCOFF | 3.2 | 3.5 | 3.7 | V | VCC falling | 7 |+| VCC UVLO Hysteresis | VCCHYS | | 0.5 | | V | | 7 |+| Start-up Delay | tSTART_DEL | | 50 | 80 | μs | VCC rising from 0 to VCCON + 1 V @ tr = 10 μs | 7 |+| Current Consumption xAxxxxx | ICC | | 1.8 | 2.5 | mA | CDRV = 0 nF, fCS = 100 kHz, tMIN_TON = tMIN_TOFF = 1 μs, tLLD = 130 μs | 7 |+| Current Consumption xAxxxxx | ICC | | 2.8 | 4 | mA | CDRV = 1 nF, fCS = 100 kHz | 7 |+| Current Consumption xAxxxxx | ICC | | 12 | 15 | mA | CDRV = 10 nF, fCS = 100 kHz | 7 |+| Current Consumption | ICC | | 1.4 | 2.2 | mA | | 7 |+| Current Consumption below UVLO | ICC_UVLO | | 35 | 60 | μA | VCC = VCCOFF, 0.1 V | 7 |+| Current Consumption in Disable Mode | ICC_DIS | | 60 | 100 | μA | t > tLLD, VLLD = 0.55 V | 7 |+| Output Voltage Rise-Time | tr | | 60 | 100 | ns | CDRV = 10 nF, 10 % to 90 % VDRVMAX, VCS = 4 to −1 V | 7 |+| Output Voltage Fall-Time | tf | | 25 | 45 | ns | CDRV = 10 nF, 90 % to 10 % VDRVMAX, VCS = −1 to 4 V | 7 |+| Driver Source Resistance | RDRV_SOURCE | | 2 | | Ω | | 7 |+| Driver Sink Resistance | RDRV_SINK | | 0.5 | | Ω | | 7 |+| Output Peak Source Current | IDRV_SOURCE | | 2 | | A | | 7 |+| Output Peak Sink Current | IDRV_SINK | | 7 | | A | | 7 |+| Maximum Driver Pulse Length | tDRV_ON_MAX | | 4 | | ms | | 7 |+| Maximum Driver Output Voltage | VDRVMAX | 9 | 10 | 11 | V | VCC = 35 V, CDRV > 1 nF, (ver. xAxxxxx) | 7 |+| Minimum Driver Output Voltage | VDRVMIN | 3.4 | 3.7 | 3.9 | V | VCC = VCCOFF + 200 mV, (ver. xAxxxxxx) | 7 |+| Total Propagation Delay CS to DRV On | tPD_ON | | 30 | 60 | ns | VCS goes down from 4 to −1 V, tf_CS <= 5 ns | 7 |+| Total Propagation Delay CS to DRV Off | tPD_OFF | | 13 | 23 | ns | VCS goes up from −1 to 4 V, tr_CS <= 5 ns | 7 |+| Turn On CS Threshold Voltage | VTH_CS_ON | -120 | -75 | -40 | mV | | 7 |+| Turn Off CS Threshold Voltage | VTH_CS_OFF | -1 | | 0 | mV | Guaranteed by Design | 7 |+| Turn Off Timer Reset Threshold Voltage | VTH_CS_RESET | 0.4 | 0.5 | 0.6 | V | | 7 |+| CS Leakage Current | ICS_LEAKAGE | | | 500 | nA | VCS = 200 V | 7 |+| dV/dt Detector High Threshold | VCS_DVDT_H | | 3 | | V | | 7 |+| dV/dt Detector Low Threshold | VCS_DVDT_L | | 0.5 | | V | | 8 |+| dV/dt Detector Threshold | tdV/dt | 13 | 25 | 37 | ns | ver. xxDxxxx | 8 |+| Minimum Trigger Pulse Duration | tTRIG_PW_MIN | | 10 | | ns | VTRIG / DIS = 5 V; Shorter pulses may not be proceeded | 8 |+| Trigger Threshold Voltage | VTRIG_TH | 1.6 | 2 | 2.2 | V | | 8 |+| Trigger to DRV Propagation Delay | tPD_TRIG | | 10 | 16.5 | ns | VTRIG / DIS goes from 0 to 5 V, tr_TRIG / DIS <= 5 ns | 8 |+| Trigger Blank Time After DRV Turn-on Event | tTRIG_BLANK | 30 | 55 | 80 | ns | VCS drops below VTH_CS_ON | 8 |+| Delay to Disable Mode | tDIS_TIM | 75 | 100 | 125 | μs | VTRIG / DIS goes from 0 to 5 V | 8 |+| Disable Recovery Timer | tDIS_REC | | 1.5 | 3 | μs | VTRIG / DIS goes down from 5 to 0 V; tMIN_TOFF = 130 ns | 8 |+| Minimum Pulse Duration to Disable Mode End | tDIS_END | | 200 | | ns | VTRIG / DIS = 0 V; Shorter pulses may not be proceeded | 8 |+| TRIG/DIS Pull Down Current | ITRIG / DIS | 7 | 11 | 15 | μA | VTRIG / DIS = 5 V | 8 |+| Maximum Transition Time | tTRIG_TRAN | | | 10 | μs | VTRIG / DIS goes from 1 to 3 V or from 3 to 1 V | 8 |+| Minimum tON time | tON_MIN | | 55 | | ns | RMIN_TON = 0 Ω (ver. xxxZxxx) | 8 |+| Minimum tOFF time | tOFF_MIN | | 70 | | ns | RMIN_TOFF = 0 Ω (ver. xxxxZxx) | 8 |+| Minimum tON time | tON_MIN | 0.9 | 1 | 1.1 | μs | RMIN_TON = 10 kΩ (ver. xxxZxxx) | 8 |+| Minimum tOFF time | tOFF_MIN | 0.9 | 1 | 1.1 | μs | RMIN_TOFF = 10 kΩ (ver. xxxxZxx) | 8 |+| Minimum tON time | tON_MIN | 4.5 | 5 | 5.5 | μs | RMIN_TON = 50 kΩ (ver. xxxZxxx) | 8 |+| Minimum tOFF time | tOFF_MIN | 4.4 | 4.9 | 5.4 | μs | RMIN_TOFF = 50 kΩ (ver. xxxxZxx) | 8 |+| LLD Pull Up Current | ILLD | -21 | -20 | -19 | μA | ver. xxxxxZx | 8 |+| LLD Time Selection: tLLD = 68 μs | VLLD | 0.4 | 0.51 | 0.63 | V | tLLD = 68 μs | 8 |+| LLD Time Selection: tLLD = 130 μs | VLLD | 0.75 | 0.89 | 1.03 | V | tLLD = 130 μs | 8 |+| LLD Time Selection: tLLD = 280 μs | VLLD | 1.15 | 1.32 | 1.5 | V | tLLD = 280 μs | 8 |+| LLD Time Selection: tLLD = 540 μs | VLLD | 1.68 | 1.82 | 1.97 | V | tLLD = 540 μs | 8 |+| LLD Time Selection: tLLD = 1075 μs | VLLD | 2.2 | 2.5 | 2.7 | V | tLLD = 1075 μs | 8 |+| LLD Time Selection: IC disabled | VLLD | | | 0.3 | V | IC disabled | 8 |+| LLD Time Selection: LLD function disabled | VLLD | 3.1 | | | V | LLD function disabled | 8 |+| LLD Main Time | tLLD | 53 | 68 | 83 | μs | VLLD = 0.51 V | 8 |+| LLD Main Time | tLLD | 100 | 130 | 160 | μs | VLLD = 0.89 V | 8 |+| LLD Main Time | tLLD | 220 | 280 | 340 | μs | VLLD = 1.32 V | 8 |+| LLD Main Time | tLLD | 420 | 540 | 660 | μs | VLLD = 1.82 V | 8 |+| LLD Main Time | tLLD | 840 | 1075 | 1310 | μs | VLLD = 2.45 V | 8 |+| Supply Voltage | VCC | -0.3 | | 37 | V | | 6 |+| Maximum Operating Voltage | VCC | | | 35 | V | | 6 |+| Operating Junction Temperature | TJ | -40 | | 125 | °C | | 6 |+| Junction to Air Thermal Resistance SOIC8 | RθJ-A_SOIC8 | | 200 | | °C/W | 1 oz 1 in2 Copper Area | 6 |++## Materials and finish++As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).++| Part | Material | Colour / plating | Datasheet says | Page |+|---|---|---|---|---|+| contacts | Copper | | VCC Pin Current (tPW = 10 μs) IVCC_DYN 3 A Junction to Air Thermal Resistance, 1 oz 1 in2 Copper Area, | 6 |++## CAD (KiCad official)++- Symbol: `NCP4306AADZZZADR2G`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `ncp4306aadzzzadr2g-etched.step` / `ncp4306aadzzzadr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncp4306aadzzzadr2g.step` / `ncp4306aadzzzadr2g.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/ncp4306aadzzza-d.pdf) (52 pp, sha256 `b9268cab907a9b76`, retrieved 2026-10-24, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ncp4306aadzzzadr2g-datasheet.pdf)
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synchronous rectification MOSFET in switch mode power supplies.
Thanks to its high performance drivers and versatility, it can be used in
various topologies such as DCM or CCM flyback, quasi resonant
flyback, forward and half bridge resonant LLC.</rdf:li>+ </rdf:Alt>+ </dc:description>+ <xmpMM:DocumentID>uuid:494b8b57-f0b9-46ee-9dc6-0a949e2a6a7c</xmpMM:DocumentID>+ <xmpMM:InstanceID>uuid:8d160769-1853-4ed1-a1db-c07365caf8e5</xmpMM:InstanceID>+ <illustrator:StartupProfile>Print</illustrator:StartupProfile>+ </rdf:Description>+ </rdf:RDF>+</x:xmpmeta>+ + + + + + + + + + + + + + + + + + + + + +<?xpacket end="w"?> +endstream+endobj+6 0 obj+<<+/Annots [64 0 R 65 0 R]+/Contents [66 0 R 67 0 R 68 0 R 69 0 R 70 0 R 71 0 R 72 0 R 73 0 R]+/CropBox [0.0 0.0 612.0 792.0]+/MediaBox [0.0 0.0 612.0 792.0]+/Parent 2 0 R+/Resources 74 0 R+/Rotate 0+/Type /Page+>>+endobj+7 0 obj+<<+/Annots [75 0 R 76 0 R 77 0 R 78 0 R]+/Contents 79 0 R+/CropBox [0.0 0.0 612.0 792.0]+/MediaBox [0.0 0.0 612.0 792.0]+/Parent 2 0 R+/Resources 80 0 R+/Rotate 0+/Type /Page+>>+endobj+8 0 obj+<<+/Annots [81 0 R]+/Contents 82 0 R+/CropBox [0.0 0.0 612.0 792.0]+/MediaBox [0.0 0.0 612.0 792.0]+/Parent 2 0 R+/Resources 83 0 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