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Initial commit: component/ncp4305ddr2g

Ray ·f681a823a0 ·2mo ago
2 files changed +90
README.mdadded+56
@@ -0,0 +1,56 @@+# NCP4305DDR2G++**onsemi** · AC-DC Controllers and Regulators · SOIC-8++NCP4305DDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC | power_in | Supply voltage pin. Operating range up to 35 V (absolute max 37 V). Requires a local decoupling capacitor to GND. |+| 2 | MIN_TOFF | input | Adjusts the minimum off-time period by connecting a resistor to ground. Input voltage range -0.3 V to VCC; current -10 to 10 mA. |+| 3 | MIN_TON | input | Adjusts the minimum on-time period by connecting a resistor to ground. Input voltage range -0.3 V to VCC. |+| 4 | LLD | input | Light-Load Detection input. Modulates the driver clamp level and/or disables the driver during light-load conditions. Input voltage range -0.3 V to VCC. |+| 5 | TRIG/DIS | input | Ultrafast (7.5 ns) turn-off trigger input used to turn off the SR MOSFET in CCM applications to improve efficiency. Activates disable mode when pulled up for more than 100 μs. Input range -0.3 V to VCC. |+| 6 | CS | input | Current sense pin - detects current flow through the SR MOSFET and/or its body diode. Basic turn-off detection threshold is 0 mV. A series resistor may decrease the turn-off threshold. Rated -4 V to 200 V dynamic (tPW = 200 ns). Reduced ESD rating vs other pins (1 kV HBM). |+| 7 | GND | power_in | Ground reference for the SR MOSFET driver and VCC decoupling capacitor. Also ground return for MIN_TON/MIN_TOFF, LLD and TRIG timing resistors. Should be wired directly to the SR MOSFET source terminal using a Kelvin connection. |+| 8 | DRV | output | Gate driver output for the SR MOSFET. 8 A / 4 A peak sink/source capability; 5 V clamped output enables GaN FET drive. Absolute max output -0.3 V to 17 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-8 |+| Category | PMIC |+| Pins | 8 |++## Ordering variants++Same part, different packaging or reel option.++- `NCP4305DDR2G`+- `NCP4305ADR2G`+- `NCP4305BDR2G`+- `NCP4305CDR2G`+- `NCP4305AMNTWG`+- `NCP4305DMNTWG`+- `NCP4305xMT`+- `NCP4305QDR2G`++## CAD (KiCad official)++- Symbol: `NCP4305DDR2G`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/ncp4305d-d.pdf) (54 pp, sha256 `52605c5620289283`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ncp4305ddr2g-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "ncp4305ddr2g",+  "version": "0.1.0",+  "type": "component",+  "description": "onsemi AC-DC Controllers and Regulators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "ncp4305ddr2g"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ncp4305ddr2g.kicad_sym",+    "ncp4305ddr2g.kicad_mod",+    "ncp4305ddr2g.glb",+    "ncp4305ddr2g.step",+    "ncp4305ddr2g.lbr",+    "docs/hero.png",+    "docs/ncp4305ddr2g-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file