component
NCP163ASN180T1G
Public Made by Adomby adom
onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+84@@ -0,0 +1,84 @@+# NCP163ASN180T1G++**onsemi** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L++NCP163ASN180T1G from onsemi, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN | power_in | Input voltage supply pin; the operating input voltage range is 2.2 V to 5.5 V and the absolute maximum input voltage is -0.3 V to 6 V. |+| 2 | GND | power_in | Common ground connection. |+| 3 | EN | input | Chip enable: applying VEN < 0.4 V disables the regulator and pulling VEN > 1.2 V enables the LDO; absolute maximum chip enable input is -0.3 V to 6 V. |+| 4 | NC | unconnected | Not connected; can be tied to the ground plane. |+| 5 | OUT | power_out | Regulated output voltage; the output should be bypassed with a small 1 µF ceramic capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOT-23-5L |+| Category | Power Management (PMIC) |+| Pins | 5 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Operating Input Voltage | VIN | 2.2 | | 5.5 | V | | 3 |+| Output Voltage Accuracy | VOUT | -2 | | 2 | % | VIN = (VOUT(NOM) + 1 V) to 5.5 V; SOT23-5L Package Only | 3 |+| Load Regulation | LoadReg | | 0.008 | 0.015 | %/mA | IOUT = 1mA to 250mA; SOT23-5L | 3 |+| Dropout Voltage | VDO | | 205 | 280 | mV | IOUT = 250 mA; VOUT(NOM) = 1.8 V; SOT23-5L Package | 3 |+| Output Current Limit | ICL | 250 | 700 | | mA | VOUT = 90% VOUT(NOM) | 3 |+| Quiescent Current | IQ | | 12 | 20 | µA | IOUT = 0 mA | 3 |+| Shutdown Current | IDIS | | 0.01 | 1 | µA | VEN ≤ 0.4 V, VIN = 4.8 V | 3 |+| EN Input Voltage High | VENH | 1.2 | | | V | EN Input Voltage “H” | 3 |+| EN Input Voltage Low | VENL | | | 0.4 | V | EN Input Voltage “L” | 3 |+| EN Pull Down Current | IEN | | 0.2 | 0.5 | µA | VEN = 4.8 V | 3 |+| Line Transient (rising step) | TranLINE | -1 | | | mV | VIN = (VOUT(NOM) + 1 V) to (VOUT(NOM) + 1.6 V) in 30 µs, IOUT = 1 mA | 4 |+| Line Transient (falling step) | TranLINE | | | 1 | mV | VIN = (VOUT(NOM) + 1.6 V) to (VOUT(NOM) + 1 V) in 30 µs, IOUT = 1 mA | 4 |+| Load Transient (1 mA to 200 mA) | TranLOAD | -40 | | | mV | IOUT = 1 mA to 200 mA in 10 µs | 4 |+| Load Transient (200 mA to 1 mA) | TranLOAD | | | 40 | mV | IOUT = 200 mA to 1 mA in 10 µs | 4 |+| Input Voltage | VIN | -0.3 | | 6 | V | Input Voltage (Note 1) | 2 |+| Output Voltage | VOUT | -0.3 | | 6 | V | −0.3 to VIN + 0.3, max. 6 V | 2 |+| Chip Enable Input | VCE | -0.3 | | 6 | V | Chip Enable Input | 2 |+| Maximum Junction Temperature | TJ | | | 150 | °C | | 2 |+| Storage Temperature | TSTG | -55 | | 150 | °C | | 2 |+| ESD Capability, Human Body Model | ESDHBM | | | 2000 | V | Human Body Model (Note 2) | 2 |+| ESD Capability, Machine Model | ESDMM | | | 200 | V | Machine Model (Note 2) | 2 |+| ESD Capability, Charged Device Model | ESDCDM | | | 1000 | V | Charged Device Model (Note 2) | 2 |+| Operating Junction Temperature | TJ | -40 | | 125 | °C | Electrical characteristics temperature range | 3 |+| Thermal Resistance, Junction-to-Air, SOT23-5 | RJA | | 218 | | °C/W | SOT23-5, JEDEC board (Note 3) | 3 |+| Line Regulation | LineReg | | 0.02 | | %/V | VOUT(NOM) + 1 V ≤ VIN ≤ 5.5 V | 3 |+| Turn-On Time, A Option | | | 120 | | µs | COUT = 1 µF, from assertion of VEN to VOUT = 95% VOUT(NOM); A option | 3 |+| Power Supply Rejection Ratio, 100 Hz | PSRR | | 91 | | dB | IOUT = 20 mA, f = 100 Hz | 3 |+| Power Supply Rejection Ratio, 1 kHz | PSRR | | 92 | | dB | IOUT = 20 mA, f = 1 kHz | 3 |+| Power Supply Rejection Ratio, 10 kHz | PSRR | | 85 | | dB | IOUT = 20 mA, f = 10 kHz | 3 |+| Power Supply Rejection Ratio, 100 kHz | PSRR | | 60 | | dB | IOUT = 20 mA, f = 100 kHz | 3 |+| Short Circuit Current | ISC | | 690 | | mA | VOUT = 0 V | 3 |+| Output Voltage Noise (1 mA) | VN | | 8 | | µVRMS | f = 10 Hz to 100 kHz, IOUT = 1 mA | 4 |+| Output Voltage Noise (250 mA) | VN | | 6.5 | | µVRMS | f = 10 Hz to 100 kHz, IOUT = 250 mA | 4 |+| Thermal Shutdown Threshold (rising) | TSDH | | 160 | | °C | Temperature rising | 4 |+| Thermal Shutdown Threshold (falling) | TSDL | | 140 | | °C | Temperature falling | 4 |+| Active Output Discharge Resistance | RDIS | | 280 | | Ω | VEN < 0.4 V, Version A only | 4 |++## CAD (KiCad official)++- Symbol: `NCP163ASN180T1G`+- Footprint: `Package_TO_SOT_SMD:SOT-23-5`+- 3D model: SOT-23-5L (KiCad packages3D, STEP)+- 3D model files: `ncp163asn180t1g-etched.step` / `ncp163asn180t1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncp163asn180t1g.step` / `ncp163asn180t1g.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588876800323145728) (25 pp, sha256 `f5a7f9bae123b8f8`, retrieved 2026-10-20, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ncp163asn180t1g-datasheet.pdf)
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Designed to meet the requirements of RF and sensitive analog circuits, the NCP163 device provides ultra−low noise, high PSRR and low quiescent current. The device also offer excelent load/line transients. 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