component
NCP12700ADNR2G
Public Made by Adomby adom
onsemi AC-DC Controllers And Regulators, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+46docs/hero.pngdocs/ncp12700adnr2g-datasheet.pdf+5557ncp12700adnr2g-hero.glbncp12700adnr2g-hero.overlay.json+304ncp12700adnr2g.glbncp12700adnr2g.kicad_mod+312ncp12700adnr2g.kicad_sym+53ncp12700adnr2g.lbr+136ncp12700adnr2g.step+3622package.json+205page.json+211viewers/footprint.html+1viewers/symbol.html+1README.mdadded+46@@ -0,0 +1,46 @@+# NCP12700ADNR2G++**onsemi** · AC-DC Controllers And Regulators · MSOP-10++NCP12700ADNR2G from onsemi, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | UVLO | input | Input to the standby and UVLO comparators, where a resistor divider from the supply input to ground sets the enable voltage, hysteresis is set by a 5 A pull-down current source, and an external pull-down signal can disable the controller. |+| 2 | FLT | bidirectional | Input to a window comparator with upper and lower fault thresholds, where tripping either threshold enters fault mode (permanent latch-off or a minimum 1 s auto-recovery period), and a precision current source drives an NTC to ground for over-temperature protection. |+| 3 | SS | bidirectional | Sets the soft-start ramp of the peak current limit when the controller is enabled, using an internal 15 A current source and an external capacitor to ground, with typical soft-start capacitor values of 10 nF to 100 nF. |+| 4 | RT | input | Sets the oscillator frequency and requires a resistor to ground located close to the IC, with typical RT values in the range of 10 k to 100 k. |+| 5 | COMP | passive | Provides the compensated error voltage for the PWM and skip comparators and includes an internal 5 k pull-up resistor that can be used to bias an opto-coupler transistor. |+| 6 | CS | input | Current sense input for the PWM and current limit comparators, whose input is held low for 60 ns after DRV goes high to blank leading-edge spikes, with an external low-pass filter recommended and its resistor also setting the over-power protection applied to the sense signal. |+| 7 | GND | power_in | Controller ground pin. |+| 8 | DRV | output | High-current output that drives the external MOSFET gate, with source capability of 1 A and sink capability of 2.8 A. |+| 9 | VCC | power_in | Bias supply for the controller, with an external decoupling capacitor of 1 to 10 F to ground recommended and a recommended supply voltage of 9 to 20 V. |+| 10 | VIN | power_in | Input to the high-voltage startup regulator, which sources more than 15 mA to temporarily bias VCC during startup, with a maximum high-voltage startup voltage of 120 V for MSOP10 and recommended VIN of 9 to 100 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | MSOP-10 |+| Category | Power Management (PMIC) |+| Pins | 10 |++## CAD (KiCad official)++- Symbol: `NCP12700ADNR2G`+- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`+- 3D model: MSOP-10 (KiCad packages3D, STEP)+- 3D model files: `ncp12700adnr2g-etched.step` / `ncp12700adnr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncp12700adnr2g.step` / `ncp12700adnr2g.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929145917489152) (21 pp, sha256 `e66b804acef20677`, retrieved 2026-10-09, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ncp12700adnr2g-datasheet.pdf)
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controller containing all of the features necessary for implementing
single−ended power converter topologies. The device features a high
voltage startup capable of operating over a wide input range and
supplying at least 15 mA to provide temporary bias to VCC during
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