component
NCP1252EDR2G
Public Made by Adomby adom
onsemi AC-DC Controllers and Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C904430). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+30−10
ncp1252edr2g.lbr+20−2@@ -62,6 +62,18 @@ <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-2.6000" y="2.4700"/>+ <vertex x="-2.8400" y="2.8000"/>+ <vertex x="-2.3600" y="2.8000"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.9750" y="2.4500"/>+ <vertex x="1.9500" y="2.4500"/>+ <vertex x="1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="1.4750"/>+ </polygon> <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -70,7 +82,7 @@ <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/> <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="NCP1252EDR2G">@@ -108,7 +120,13 @@ <connect gate="G$1" pin="DRV" pad="6"/> <connect gate="G$1" pin="GND" pad="5"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="NCP1252EDR2G" constant="no"/>+ <attribute name="MANUFACTURER" value="onsemi" constant="no"/>+ <attribute name="LCSC_PN" value="C904430" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+10−8@@ -26,31 +26,33 @@ "model_3d_step": "ncp1252edr2g.step", "lbr": "ncp1252edr2g.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C904430"+ }, "pins": [ { "number": "1", "name": "FB", "type": "input",- "description": "Feedback input. Directly connects to an optocoupler collector. Internally pulled up (~3.5 kΩ) to Vdd; the FB voltage is divided by 3 to form the current setpoint (VILIM = 1 V). Max FB current 1.5 mA."+ "description": "Feedback input. Directly connects to an optocoupler collector. Internally pulled up (~3.5 k\u03a9) to Vdd; the FB voltage is divided by 3 to form the current setpoint (VILIM = 1 V). Max FB current 1.5 mA." }, { "number": "2", "name": "BO", "type": "input",- "description": "Brown-Out input. Monitors an image of the input bulk voltage via a resistor divider to provide brown-out protection. Threshold VBO = 1 V typ; internal 10 µA hysteresis current source."+ "description": "Brown-Out input. Monitors an image of the input bulk voltage via a resistor divider to provide brown-out protection. Threshold VBO = 1 V typ; internal 10 \u00b5A hysteresis current source." }, { "number": "3", "name": "CS", "type": "input",- "description": "Current Sense input. Monitors the primary MOSFET current through a sense resistor and sets the ramp-compensation amplitude. Cycle-by-cycle limit VILIM = 1 V; fault threshold FCS = 1 V; 160 ns leading-edge blanking; internal ramp comp Rramp ≈ 26.5 kΩ."+ "description": "Current Sense input. Monitors the primary MOSFET current through a sense resistor and sets the ramp-compensation amplitude. Cycle-by-cycle limit VILIM = 1 V; fault threshold FCS = 1 V; 160 ns leading-edge blanking; internal ramp comp Rramp \u2248 26.5 k\u03a9." }, { "number": "4", "name": "RT", "type": "passive",- "description": "Timing element. A resistor to ground fixes the switching frequency (RT = 43 kΩ → fOSC ≈ 100 kHz; RT = 8.5 kΩ → fOSC ≈ 500 kHz). Frequency is jittered ±5% at 3.33 ms period."+ "description": "Timing element. A resistor to ground fixes the switching frequency (RT = 43 k\u03a9 \u2192 fOSC \u2248 100 kHz; RT = 8.5 k\u03a9 \u2192 fOSC \u2248 500 kHz). Frequency is jittered \u00b15% at 3.33 ms period." }, { "number": "5",@@ -62,19 +64,19 @@ "number": "6", "name": "DRV", "type": "output",- "description": "Gate driver output to the external power MOSFET. +500 mA source / -800 mA sink capability; source resistance 10 Ω typ, sink 6 Ω typ; clamped at 15 V typ (max 18 V) to protect the MOSFET gate."+ "description": "Gate driver output to the external power MOSFET. +500 mA source / -800 mA sink capability; source resistance 10 \u03a9 typ, sink 6 \u03a9 typ; clamped at 15 V typ (max 18 V) to protect the MOSFET gate." }, { "number": "7", "name": "VCC", "type": "power_in",- "description": "Main supply pin. Operating range 8 V to 28 V (30 V transient <10 ms for IVCC<20 mA). For the E version, VCC(on) ≈ 14 V, VCC(off) ≈ 9 V with 5 V hysteresis (auto-recovery UVLO). Max injected current 20 mA."+ "description": "Main supply pin. Operating range 8 V to 28 V (30 V transient <10 ms for IVCC<20 mA). For the E version, VCC(on) \u2248 14 V, VCC(off) \u2248 9 V with 5 V hysteresis (auto-recovery UVLO). Max injected current 20 mA." }, { "number": "8", "name": "SSTART", "type": "passive",- "description": "Soft-start pin. A capacitor to ground sets the soft-start duration (charge current ISS = 10 µA typ, VSS = 4 V). The pin is held to ground during the internal start-up delay timer (no delay for E version)."+ "description": "Soft-start pin. A capacitor to ground sets the soft-start duration (charge current ISS = 10 \u00b5A typ, VSS = 4 V). The pin is held to ground during the internal start-up delay timer (no delay for E version)." } ], "provenance": {